Current mode logic-CMOS converter
    1.
    发明授权
    Current mode logic-CMOS converter 有权
    电流模式逻辑CMOS转换器

    公开(公告)号:US07405600B2

    公开(公告)日:2008-07-29

    申请号:US11831348

    申请日:2007-07-31

    IPC分类号: H03K19/0175

    CPC分类号: H03K19/018514

    摘要: A current mode logic (CML)-CMOS converter comprises an input stage that is turned on/off by receiving an input voltage from the outside; a voltage control unit that outputs a constant voltage; a first switching unit that is connected to the input stage and the voltage control unit and is turned on/off by the constant voltage applied from the voltage control unit; and a second switching unit that is connected to the input stage and is turned on/off by a signal applied from the input stage.

    摘要翻译: 电流模式逻辑(CML)-CMOS转换器包括通过从外部接收输入电压而被接通/断开的输入级; 输出恒定电压的电压控制单元; 第一开关单元,其连接到所述输入级和所述电压控制单元,并且通过从所述电压控制单元施加的恒定电压来接通/断开; 以及第二开关单元,其连接到所述输入级,并且通过从所述输入级施加的信号导通/截止。

    DC OFFSET CANCELLATION CIRCUIT AND PROGRAMMABLE GAIN AMPLIFIER USING THE SAME
    2.
    发明申请
    DC OFFSET CANCELLATION CIRCUIT AND PROGRAMMABLE GAIN AMPLIFIER USING THE SAME 失效
    直流偏移消除电路和可编程增益放大器

    公开(公告)号:US20070216476A1

    公开(公告)日:2007-09-20

    申请号:US11684783

    申请日:2007-03-12

    IPC分类号: H03F1/02

    CPC分类号: H03G1/0088

    摘要: In a DC offset cancellation circuit, an operational amplifier is provided with an inverse terminal, a non-inverse terminal and an output terminal. A first resistor is connected to the non-inverse terminal. A second resistor connected between the inverse terminal and the output terminal. A DC offset cancellation resistor is connected between the inverse terminal and the non-inverse terminal. Also, in each of first and second DC offset cancellation circuits of the programmable gain amplifier, an operational amplifier is provided with an inverse terminal, a non-inverse terminal and an output terminal. A first resistor is connected to the non-inverse terminal. A second resistor is connected between the inverse terminal and the output terminal. A DC offset cancellation circuit is connected between the inverse terminal and the non-inverse terminal. Here, the first and second DC offset cancellation circuits are connected with each other in series.

    摘要翻译: 在DC偏移消除电路中,运算放大器设置有反向端子,非反向端子和输出端子。 第一电阻器连接到非反相端子。 连接在反向端子和输出端子之间的第二个电阻。 直流偏移消除电阻连接在反向端子和非反向端子之间。 此外,在可编程增益放大器的第一和第二DC偏移消除电路的每一个中,运算放大器设置有反向端子,非反相端子和输出端子。 第一电阻器连接到非反相端子。 反向端子和输出端子之间连接有第二个电阻。 DC偏移消除电路连接在反向终端和非反向终端之间。 这里,第一和第二DC偏移消除电路彼此串联连接。

    Dual-system transmitting and receiving device
    3.
    发明申请
    Dual-system transmitting and receiving device 审中-公开
    双系统发射和接收设备

    公开(公告)号:US20080008271A1

    公开(公告)日:2008-01-10

    申请号:US11822842

    申请日:2007-07-10

    摘要: Provided is a dual-system transmitting device comprising a chaos signal generator that generates a chaos signal; a band-pass filter that filters the generated chaos signal into a signal within an information transmission bandwidth preset in a transmission side; an impulse signal generator that generates an impulse signal synchronized with a transmitted signal; a switching element that selectively outputs the chaos signal passing through the band-pass filter and the generated impulse signal; an amplifier that amplifies the signal selected by the switching element; and a signal transmitting unit that transmits the signal amplified by the amplifier through an antenna. When the signal amplified by the amplifier is a chaos signal, the signal transmitting unit modulates the amplified signal through an OOK (on-off keying) scheme such that the signal is transmitted as a carrier of a transmitted signal. When the signal amplified by the amplifier is an impulse signal, the signal transmitting unit passes the signal to transmit.Provided is a dual-system receiving device, which is applied to both a received signal using a chaos signal as a carrier and a received signal using an impulse signal as a carrier, the dual-system receiving device comprising a band-pass filter that filters a received signal into a signal within an information transmission bandwidth preset in a reception side; an amplifier that amplifies the filtered received signal; a first demodulator that, when the amplified received signal is a received signal using a chaos signal as a carrier, demodulates the amplified received signal; a second demodulator that, when the amplified received signal is a received signal using an impulse signal as a carrier, demodulates the amplified received signal; and a switching element that selectively outputs the received signal amplified by the amplifier to the first or second demodulator.

    摘要翻译: 提供了一种双系统发射装置,其包括产生混沌信号的混沌信号发生器; 带通滤波器,其将产生的混沌信号滤波成在发送侧预设的信息传输带宽内的信号; 产生与发送信号同步的脉冲信号的脉冲信号发生器; 选择性地输出通过带通滤波器的紊乱信号和产生的脉冲信号的开关元件; 放大器,放大由开关元件选择的信号; 以及信号发送单元,其通过天线发送由放大器放大的信号。 当由放大器放大的信号是混沌信号时,信号发送单元通过OOK(开关键控)方式来调制放大的信号,使得信号作为发送信号的载波被发送。 当由放大器放大的信号是脉冲信号时,信号发送单元通过信号进行发送。 提供了一种双系统接收装置,其被应用于使用混沌信号作为载波的接收信号和使用脉冲信号作为载波的接收信号,该双系统接收装置包括滤波器 将接收到的信号输入到在接收侧预设的信息传输带宽内的信号中; 放大器,滤波后的接收信号; 第一解调器,当放大的接收信号是使用混沌信号作为载波的接收信号时,解调放大的接收信号; 第二解调器,当放大的接收信号是使用脉冲信号作为载波的接收信号时,解调放大的接收信号; 以及选择性地将由放大器放大的接收信号输出到第一或第二解调器的开关元件。

    CURRENT MODE LOGIC-CMOS CONVERTER
    4.
    发明申请
    CURRENT MODE LOGIC-CMOS CONVERTER 有权
    电流模式逻辑 - CMOS转换器

    公开(公告)号:US20080036496A1

    公开(公告)日:2008-02-14

    申请号:US11831348

    申请日:2007-07-31

    CPC分类号: H03K19/018514

    摘要: A current mode logic (CML)-CMOS converter comprises an input stage that is turned on/off by receiving an input voltage from the outside; a voltage control unit that outputs a constant voltage; a first switching unit that is connected to the input stage and the voltage control unit and is turned on/off by the constant voltage applied from the voltage control unit; and a second switching unit that is connected to the input stage and is turned on/off by a signal applied from the input stage.

    摘要翻译: 电流模式逻辑(CML)-CMOS转换器包括通过从外部接收输入电压而被接通/断开的输入级; 输出恒定电压的电压控制单元; 第一开关单元,其连接到所述输入级和所述电压控制单元,并且通过从所述电压控制单元施加的恒定电压来接通/断开; 以及第二开关单元,其连接到所述输入级,并且通过从所述输入级施加的信号导通/截止。

    LOCATION AWARENESS SYSTEM USING RFID AND WIRELESS CONNECTIVITY APPARATUS FOR LOCATION AWARENESS SYSTEM USED THEREIN
    5.
    发明申请
    LOCATION AWARENESS SYSTEM USING RFID AND WIRELESS CONNECTIVITY APPARATUS FOR LOCATION AWARENESS SYSTEM USED THEREIN 审中-公开
    使用RFID和无线连接装置的位置感知系统用于位置识别系统

    公开(公告)号:US20070075873A1

    公开(公告)日:2007-04-05

    申请号:US11537201

    申请日:2006-09-29

    IPC分类号: G08B5/22

    摘要: A location awareness system using RFID and a wireless communication apparatus for the location awareness are provided. The location awareness system includes a RFID tag, a wireless communication apparatus for location awareness, more than three anchors, a coordinator, and a server. The wireless communication apparatus identifies the target object with the RFID attached through communicating with the RFID tag. The anchors receive information about the identified target object and measuring a distance by communication with the wireless communication apparatus using a predetermined wireless communication scheme. The coordinator collects the measure distance and the information from each of the anchors. The server calculates a location of the target object by receiving information about the measured distances and the target objects from the coordinator and calculating the location of the wireless communication apparatus using the received information.

    摘要翻译: 提供了使用RFID的位置感知系统和用于位置感知的无线通信装置。 位置感知系统包括RFID标签,用于位置感知的无线通信装置,三个以上的锚点,协调器和服务器。 无线通信装置通过与RFID标签通信来附着RFID来识别目标对象。 锚点通过使用预定的无线通信方案与无线通信装置进行通信来接收关于所识别的目标对象的信息并测量距离。 协调员从每个锚收集测量距离和信息。 服务器通过从协调器接收关于测量距离的信息和目标对象并使用接收到的信息来计算无线通信装置的位置来计算目标对象的位置。

    DC offset cancellation circuit and programmable gain amplifier using the same
    7.
    发明授权
    DC offset cancellation circuit and programmable gain amplifier using the same 失效
    DC偏移消除电路和使用其的可编程增益放大器

    公开(公告)号:US07557649B2

    公开(公告)日:2009-07-07

    申请号:US11684783

    申请日:2007-03-12

    IPC分类号: H03F1/02

    CPC分类号: H03G1/0088

    摘要: In a DC offset cancellation circuit, an operational amplifier is provided with an inverse terminal, a non-inverse terminal and an output terminal. A first resistor is connected to the non-inverse terminal. A second resistor connected between the inverse terminal and the output terminal. A DC offset cancellation resistor is connected between the inverse terminal and the non-inverse terminal. Also, in each of first and second DC offset cancellation circuits of the programmable gain amplifier, an operational amplifier is provided with an inverse terminal, a non-inverse terminal and an output terminal. A first resistor is connected to the non-inverse terminal. A second resistor is connected between the inverse terminal and the output terminal. A DC offset cancellation circuit is connected between the inverse terminal and the non-inverse terminal. Here, the first and second DC offset cancellation circuits are connected with each other in series.

    摘要翻译: 在DC偏移消除电路中,运算放大器设置有反向端子,非反向端子和输出端子。 第一电阻器连接到非反相端子。 连接在反向端子和输出端子之间的第二个电阻。 直流偏移消除电阻连接在反向端子和非反向端子之间。 此外,在可编程增益放大器的第一和第二DC偏移消除电路的每一个中,运算放大器设置有反向端子,非反相端子和输出端子。 第一电阻器连接到非反相端子。 反向端子和输出端子之间连接有第二个电阻。 DC偏移消除电路连接在反向终端和非反向终端之间。 这里,第一和第二DC偏移消除电路彼此串联连接。

    Method for compensating performance degradation of RFIC using EM simulation
    8.
    发明授权
    Method for compensating performance degradation of RFIC using EM simulation 有权
    使用EM模拟来补偿RFIC性能下降的方法

    公开(公告)号:US07954079B2

    公开(公告)日:2011-05-31

    申请号:US11943211

    申请日:2007-11-20

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5068 G06F17/5036

    摘要: Provided is a method for compensating performance degradation of a radio frequency integrated circuit (RFIC) using an EM simulation. The method includes the steps of: (a) extracting the design specifications of the RFIC so as design and simulate a circuit; (b) designing the layout of the designed and simulated circuit, and extracting layout parameters by using the designed layout; (c) simplifying the layout and carrying out the EM simulation to extract performance parameters; (d) carrying out a circuit simulation by using the extracted layout parameters and performance parameters, and judging whether the results of the circuit simulation satisfy the design specifications of the RFIC or not; (e) when it is judged that the results of the circuit simulation satisfy the design specifications of the RFIC, performing a circuit manufacturing process; and (f) when it is not judged that the results of the circuit simulation satisfy the design specifications of the RFIC, partially removing the layout, and carrying out the EM simulation, thereby analyzing and compensating a performance degradation region.

    摘要翻译: 提供了一种使用EM模拟来补偿射频集成电路(RFIC)的性能劣化的方法。 该方法包括以下步骤:(a)提取RFIC的设计规范,以设计和模拟电路; (b)设计和仿真电路的布局设计,并通过设计布局提取布局参数; (c)简化布局并执行EM仿真以提取性能参数; (d)使用提取的布局参数和性能参数进行电路仿真,判断电路仿真结果是否满足RFIC的设计规范; (e)当判断电路仿真的结果满足RFIC的设计规范时,执行电路制造过程; 和(f)当不判断电路仿真的结果满足RFIC的设计规范时,部分地去除布局并进行EM仿真,从而分析和补偿性能退化区域。

    Chaotic signal generator for ultra wide band communication system
    9.
    发明授权
    Chaotic signal generator for ultra wide band communication system 有权
    用于超宽带通信系统的混沌信号发生器

    公开(公告)号:US07463103B2

    公开(公告)日:2008-12-09

    申请号:US11428786

    申请日:2006-07-05

    IPC分类号: H03L7/07

    CPC分类号: H04B1/7174

    摘要: In a chaotic signal generator, a first signal generator generates a first signal. The first signal includes a first fundamental wave having a preset first frequency and a plurality of harmonic waves of the first fundamental wave. A second signal generator generates a second signal. The second signal includes a second fundamental wave having a preset second frequency and a plurality of harmonic waves of the second fundamental wave. Also, a mixer mixes the first signal from the first signal generator with the second signal from the second signal generator to generate a chaotic signal having a sum frequency of the first and second signals and the harmonic waves of the first and second signals. A filter passes a signal of a preset band out of the chaotic signal from the mixer.

    摘要翻译: 在混沌信号发生器中,第一信号发生器产生第一信号。 第一信号包括具有预设第一频率和第一基波的多个谐波的第一基波。 第二信号发生器产生第二信号。 第二信号包括具有预设的第二频率和第二基波的多个谐波的第二基波。 此外,混频器将来自第一信号发生器的第一信号与来自第二信号发生器的第二信号混合,以产生具有第一和第二信号的和频和第一和第二信号的谐波的混沌信号。 滤波器将来自混频器的混沌信号中的预设频带的信号传递出去。

    ULTRA-WIDE BAND PULSE SIGNAL GENERATOR
    10.
    发明申请
    ULTRA-WIDE BAND PULSE SIGNAL GENERATOR 审中-公开
    超宽带脉冲信号发生器

    公开(公告)号:US20090072876A1

    公开(公告)日:2009-03-19

    申请号:US12210127

    申请日:2008-09-12

    IPC分类号: H03K3/00

    CPC分类号: H03K5/12 H03K5/159 H04B1/7174

    摘要: There is provided an ultra-wide band pulse signal generator that can vary a waveform and bandwidth of a pulse signal by delaying transmitted data according to a clock signal without using a delay line to generate the pulse signal. An ultra-wide band pulse signal generator according to an aspect of the invention may include: a signal generating unit sequentially delaying transmitted data according to a predetermined clock signal to generate a plurality of pulse signals; an amplification unit amplifying the plurality of pulse signals from the signal generating unit according to predetermined amplification ratios; and a combination unit combining the plurality of pulse signals amplified by the amplification unit.

    摘要翻译: 提供了一种超宽带脉冲信号发生器,其可以通过根据时钟信号延迟发送的数据而不使用延迟线来产生脉冲信号来改变脉冲信号的波形和带宽。 根据本发明的一个方面的超宽带脉冲信号发生器可以包括:信号发生单元,根据预定的时钟信号顺序地延迟所发送的数据,以产生多个脉冲信号; 放大单元,根据预定的放大率,放大来自信号发生单元的多个脉冲信号; 以及组合由放大单元放大的多个脉冲信号的组合单元。