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    Timing estimator in OQPSK demodulator
    1.
    发明申请
    Timing estimator in OQPSK demodulator 有权
    OQPSK解调器中的定时估计器

    公开(公告)号：US20070121765A1

    公开(公告)日：2007-05-31

    申请号：US11549025

    申请日：2006-10-12

    申请人： Sang Hyun Min ,  Hyung Jin Choi ,  Joo Hyun Do ,  Shin Woo Kang ,  Tah Joon PARK ,  Koon Shik Cho

    发明人： Sang Hyun Min ,  Hyung Jin Choi ,  Joo Hyun Do ,  Shin Woo Kang ,  Tah Joon PARK ,  Koon Shik Cho

    IPC分类号： H04L27/06 ,  H04L27/22

    CPC分类号： H04L7/041 ,  H04L27/2278 ,  H04L27/2331

    摘要： A timing estimator of an OQPSK demodulator is provided. In the timing estimator, an A/D converter converts an analog reception signal into a digital reception signal. A differential circuit section delays the digital reception signal from the A/D converter by a preset time and obtains a phase difference between a conjugate complex number signal of the delayed digital reception signal and the digital reception signal to offset a frequency error contained in the digital reception signal. A correlation operation section performs a correlation operation between a reference symbol differentiated in the same way as a differentiation of the differential circuit section and the reception signal to obtain each correlation value. A coherent detector detects a coherent point on the basis of the correlation value from the correlation operation section.

    摘要翻译： 提供OQPSK解调器的定时估计器。 在定时估计器中，A / D转换器将模拟接收信号转换为数字接收信号。 差分电路部分将来自A / D转换器的数字接收信号延迟预设时间，并且获得延迟的数字接收信号的共轭复数信号与数字接收信号之间的相位差，以抵消包含在数字 接收信号。 相关运算部分以与差分电路部分的微分和接收信号相同的方式执行区分的参考符号之间的相关运算，以获得每个相关值。 相干检测器根据相关运算部分的相关值检测相干点。

    Timing estimator in OQPSK demodulator
    2.
    发明授权
    Timing estimator in OQPSK demodulator 有权
    OQPSK解调器中的定时估计器

    公开(公告)号：US07792216B2

    公开(公告)日：2010-09-07

    申请号：US11549025

    申请日：2006-10-12

    申请人： Sang Hyun Min ,  Hyung Jin Choi ,  Joo Hyun Do ,  Shin Woo Kang ,  Tah Joon Park ,  Koon Shik Cho

    发明人： Sang Hyun Min ,  Hyung Jin Choi ,  Joo Hyun Do ,  Shin Woo Kang ,  Tah Joon Park ,  Koon Shik Cho

    IPC分类号： H03K9/00 ,  H04L27/00

    CPC分类号： H04L7/041 ,  H04L27/2278 ,  H04L27/2331

    摘要： A timing estimator of an OQPSK demodulator is provided. In the timing estimator, an A/D converter converts an analog reception signal into a digital reception signal. A differential circuit section delays the digital reception signal from the A/D converter by a preset time and obtains a phase difference between a conjugate complex number signal of the delayed digital reception signal and the digital reception signal to offset a frequency error contained in the digital reception signal. A correlation operation section performs a correlation operation between a reference symbol differentiated in the same way as a differentiation of the differential circuit section and the reception signal to obtain each correlation value. A coherent detector detects a coherent point on the basis of the correlation value from the correlation operation section.

    摘要翻译： 提供OQPSK解调器的定时估计器。 在定时估计器中，A / D转换器将模拟接收信号转换为数字接收信号。 差分电路部分将来自A / D转换器的数字接收信号延迟预设时间，并且获得延迟的数字接收信号的共轭复数信号与数字接收信号之间的相位差，以抵消包含在数字 接收信号。 相关运算部分以与差分电路部分的微分和接收信号相同的方式执行区分的参考符号之间的相关运算，以获得每个相关值。 相干检测器根据相关运算部分的相关值检测相干点。

    Symbol detector based on frequency offset compensation in ZigBee system and symbol detecting method thereof
    3.
    发明授权
    Symbol detector based on frequency offset compensation in ZigBee system and symbol detecting method thereof 有权
    基于ZigBee系统中频偏补偿的符号检测器及其符号检测方法

    公开(公告)号：US07558346B2

    公开(公告)日：2009-07-07

    申请号：US11427771

    申请日：2006-06-29

    申请人： Sang Hyun Min ,  Hyung Jin Choi ,  Jung Su Han ,  Joo Hyun Do ,  Tah Joon Park ,  Kwang Mook Lee ,  Koon Shik Cho ,  U Sang Lee

    发明人： Sang Hyun Min ,  Hyung Jin Choi ,  Jung Su Han ,  Joo Hyun Do ,  Tah Joon Park ,  Kwang Mook Lee ,  Koon Shik Cho ,  U Sang Lee

    IPC分类号： H04B1/00 ,  H04L27/06

    CPC分类号： H04L27/2657 ,  H04B1/708 ,  H04B1/709 ,  H04L27/261 ,  H04L27/2675

    摘要： The invention relates to a symbol detector for detecting symbols received in a receive modem of short-range wireless personal area network of a ZigBee system (IEEE 802.15.4). An OQPSK short-range wireless communication system according to the invention acquires frequency offset in a received signal using a symbol contained in a preamble of a packet of the signal, multi-delay-differentiates the signal by a plurality of predetermined delay times, and complex-conjugates the acquired frequency offset to eliminate the frequency offset. Then, the OQPSK short-range wireless communication system according to the invention correlates the received signal with a PN sequence delay-differentiated through the same process to detect the symbols corresponding to the received signal.

    摘要翻译： 本发明涉及一种用于检测在ZigBee系统（IEEE 802.15.4）的短距离无线个域网的接收调制解调器中接收的符号的符号检测器。 根据本发明的OQPSK短距离无线通信系统使用包含在信号分组的前导码中的符号来获取接收信号中的频率偏移，将信号多延迟多个预定延迟时间，并且复数 收集频率偏移以消除频率偏移。 然后，根据本发明的OQPSK短距离无线通信系统将接收到的信号与通过相同处理延迟差分的PN序列相关，以检测对应于接收信号的符号。

    Multiple differential demodulator using weighting value
    4.
    发明授权
    Multiple differential demodulator using weighting value 失效
    多重差分解调器采用加权值

    公开(公告)号：US07643579B2

    公开(公告)日：2010-01-05

    申请号：US11457116

    申请日：2006-07-12

    申请人： Sang Hyun Min ,  Tah Joon Park ,  U Sang Lee ,  Koon Shik Cho ,  Kwang Mook Lee

    发明人： Sang Hyun Min ,  Tah Joon Park ,  U Sang Lee ,  Koon Shik Cho ,  Kwang Mook Lee

    IPC分类号： H04L27/22 ,  H03D3/22 ,  H04L27/06

    CPC分类号： H04B14/06 ,  H04W84/10

    摘要： The present invention relates to a multiple differential demodulator using a weighting value. The multiple differential demodulator according to the present invention includes a weighting value generator for integrating a real part and an imaginary part of a value acquired by multiplying one of a plurality of differentiated reception signals by a conjugated value of a differentiated PN code signal corresponding to a preset symbol, and determining the greater of the integrated real and integrated imaginary parts to apply a predetermined weighting value to the greater value, where the PN code signal is differentiated in the same fashion as the differentiated reception signals.

    摘要翻译： 本发明涉及使用加权值的多重差分解调器。 根据本发明的多重差分解调器包括一个加权值产生器，用于将通过将多个差分接收信号中的一个相乘而得到的值的实部和虚部进行积分，该复数值与对应于 并且确定积分的实数和积分虚部中的较大者，以将预定加权值应用于较大值，其中PN码信号以与差分接收信号相同的方式进行微分。

    SYNCHRONIZATION DEVICE AND METHOD FOR WIRELESS COMMUNICATION PACKETS
    7.
    发明申请
    SYNCHRONIZATION DEVICE AND METHOD FOR WIRELESS COMMUNICATION PACKETS 审中-公开
    用于无线通信分组的同步设备和方法

    公开(公告)号：US20080101516A1

    公开(公告)日：2008-05-01

    申请号：US11925121

    申请日：2007-10-26

    申请人： Koon Shik Cho ,  Seung Han Ko ,  Jae Hyung Lee ,  Kwang Mook Lee ,  Sang Hyun Min ,  Sang Ho Lee ,  U Sang Lee

    发明人： Koon Shik Cho ,  Seung Han Ko ,  Jae Hyung Lee ,  Kwang Mook Lee ,  Sang Hyun Min ,  Sang Ho Lee ,  U Sang Lee

    IPC分类号： H04L7/02

    CPC分类号： H04L7/08

    摘要： Provided is a synchronization device for wireless communication packets, the synchronization device including an A/D (analog/digital) converter that converts an analog input signal applied from outside into a digital signal; a correlation calculating section that is connected to the A/D converter and correlates the converted input signal with a preset reference code so as to calculate a correlation value; a threshold setting section that is connected to the correlation calculating section and sets a threshold value of the correlation value; a maximum correlation detecting section that is connected to the correlation calculating section and the threshold setting section, compares the correlation value with the threshold value, detects the position of the maximum correlation value within each symbol of the input signal when the correlation value is larger than the threshold value, and judges whether a difference in position between the maximum correlation values of consecutive symbols is equal to the period of one symbol or not; a preamble detecting section that is connected to the correlation calculating section and the maximum correlation detecting section and outputs a preamble detection signal when the difference is equal to the period of one symbol; and a data detecting section that receives data of the input signal when the preamble detection signal is applied.

    摘要翻译： 提供了一种用于无线通信分组的同步装置，该同步装置包括将从外部施加的模拟输入信号转换为数字信号的A / D（模拟/数字）转换器; 相关计算部分，连接到A / D转换器，并将转换的输入信号与预置的参考码相关联，以便计算相关值; 阈值设定部，与相关计算部连接并设定相关值的阈值; 连接到相关计算部分和阈值设定部分的最大相关检测部分将相关值与阈值进行比较，当相关值大于该值时，检测输入信号的每个符号内的最大相关值的位置 阈值，并且判断连续符号的最大相关值之间的位置差是否等于一个符号的周期; 前同步码检测部，其连接到所述相关计算部和所述最大相关检测部，并且当所述差等于一个符号的周期时，输出前同步码检测信号; 以及数据检测部分，当应用前导码检测信号时，接收输入信号的数据。

    Direct sequence spread spectrum transceiver
    8.
    发明授权
    Direct sequence spread spectrum transceiver 有权
    直接序列扩频收发器

    公开(公告)号：US07957452B2

    公开(公告)日：2011-06-07

    申请号：US12098396

    申请日：2008-04-04

    申请人： Sang Hyun Min ,  Koon Shik Cho ,  Jae Hyung Lee ,  Kwang Mook Lee

    发明人： Sang Hyun Min ,  Koon Shik Cho ,  Jae Hyung Lee ,  Kwang Mook Lee

    IPC分类号： H04B1/707

    CPC分类号： H04B1/707 ,  H04J13/004

    摘要： A direct sequence spread spectrum (DSSS) transceiver including a DSSS transmitter and a DSSS receiver, wherein the DSSS transmitter includes: an integral code mapping unit mapping source bit data in one of 2N (N is a natural number) of predetermined symbols by N bits and mapping the symbol in one of integral code words that are obtained by previously integrating each of 2N of bi-orthogonal code words; and a radio frequency (RF) transmitting unit transmitting the integral code words mapped by the integral code mapping unit over an RF carrier wave, and the DSSS receiver includes: an RF receiving unit removing an RF carrier wave from an RF signal from the RF transmitting unit and converting an analog signal obtained by removing the RF carrier wave from the RF signal into a digital signal; a differential circuit unit differentiating and converting the digital signal from the RF receiving unit into bi-orthogonal code words; and a symbol detection unit detecting a symbol corresponding to a maximum value of correlation values between bi-orthogonal code word from the differential circuit unit and a plurality of predetermined reference code words.

    摘要翻译： 包括DSSS发射机和DSSS接收机的直接序列扩频（DSSS）收发机，其中DSSS发射机包括：一个整数码映射单元，用于将预定符号的2N（N是自然数）之一的N比特的源比特数据映射到N比特 以及将符号映射到通过预先积分2N个双正交码字中的每一个而获得的积分码字之一中的符号; 以及射频（RF）发送单元，其通过RF载波发送由积分码映射单元映射的积分码字，并且所述DSSS接收机包括：RF接收单元，从RF发射的RF信号中去除RF载波; 将通过从RF信号中去除RF载波而获得的模拟信号转换为数字信号; 差分电路单元，将来自RF接收单元的数字信号分解并转换成双正交码字; 以及符号检测单元，检测与来自差分电路单元的双正交码字和多个预定参考码字之间的相关值的最大值相对应的符号。

    Receiver having digital timing recovery function
    9.
    发明授权
    Receiver having digital timing recovery function 有权
    接收机具有数字定时恢复功能

    公开(公告)号：US07496156B2

    公开(公告)日：2009-02-24

    申请号：US11330212

    申请日：2006-01-12

    申请人： U Sang Lee ,  Tah Joon Park ,  Kwang Mook Lee ,  Sang Hyun Min

    发明人： U Sang Lee ,  Tah Joon Park ,  Kwang Mook Lee ,  Sang Hyun Min

    IPC分类号： H04L27/00

    CPC分类号： H04L7/0334 ,  H04L7/042 ,  H04L7/046

    摘要： The invention relates to a receiver having a digital timing recovery function. The receiver of the invention detects frequency offset of a received signal by using symbol correlation between the received signal and a reference signal, and increases/decreases the number of data samples according to the detected frequency offset, thereby recovering symbol timing of the received signal.

    摘要翻译： 本发明涉及具有数字定时恢复功能的接收机。 本发明的接收机通过使用接收信号和参考信号之间的符号相关来检测接收信号的频偏，并且根据检测到的频率偏移增加/减少数据样本数，从而恢复接收信号的符号定时。

    Receiver with sigma-delta structure
    10.
    发明授权
    Receiver with sigma-delta structure 有权
    具有Σ-Δ结构的接收器

    公开(公告)号：US08095100B2

    公开(公告)日：2012-01-10

    申请号：US12137479

    申请日：2008-06-11

    申请人： Yong Il Kwon ,  Sang Hyun Min ,  Tah Joon Park

    发明人： Yong Il Kwon ,  Sang Hyun Min ,  Tah Joon Park

    IPC分类号： H04B17/00 ,  H04B1/06 ,  H04B7/00

    CPC分类号： H04B1/0007

    摘要： There is provided a receiver with a sigma-delta structure, the receiver including: a low noise amplifier amplifying a received signal according to a detection signal; a mixer converting an RF signal of the low noise amplifier into an IF signal; a sigma-delta A/D converter converting the IF signal from the mixer 200 into a digital signal; a 1 bit detector determining whether a voltage of the output signal of the mixer is greater than that of a predetermined reference voltage and outputting the detection signal including a result of the determination; and a demodulator obtaining an FFT result with respect to the signal from the sigma-delta A/D converter and adding or subtracting a predetermined gain value to or from the FFT result to calculate received signal strength indication (RSSI).

    摘要翻译： 提供具有Σ-Δ结构的接收机，所述接收机包括：低噪声放大器，根据检测信号放大接收信号; 将低噪声放大器的RF信号转换成IF信号的混频器; 将来自混频器200的IF信号转换成数字信号的Σ-ΔA/ D转换器; 1比特检测器，确定混频器的输出信号的电压是否大于预定参考电压的输出信号，并输出包括确定结果的检测信号; 以及解调器，相对于来自Σ-ΔA/ D转换器的信号获得FFT结果，并向FFT结果加上或减去预定增益值，以计算接收信号强度指示（RSSI）。