公开(公告)号：US09870825B2

公开(公告)日：2018-01-16

申请号：US14733239

申请日：2015-06-08

申请人： Sang-Wan Nam ,  Wandong Kim

发明人： Sang-Wan Nam ,  Wandong Kim

IPC分类号： G11C16/10 ,  G11C16/24 ,  G11C16/08 ,  G11C16/04 ,  G11C11/56

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/24

摘要： A nonvolatile memory device includes a memory cell array, an address decoder, a read & write circuit and control logic. The memory cell array includes a plurality of memory blocks including a plurality of cell strings, each cell string including a plurality of memory cells stacked in a direction perpendicular to a substrate. The control logic controls operations so that in a program operation, when the selected word line satisfies a precharge condition, a program voltage to be applied to the selected word line is applied before a pass voltage to be applied to an unselected word line.