公开(公告)号：US08046502B2

公开(公告)日：2011-10-25

申请号：US12175155

申请日：2008-07-17

申请人： Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Jong-Sang Choi ,  Sung-Hyun Kim ,  Chul-Joon Choi

发明人： Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Jong-Sang Choi ,  Sung-Hyun Kim ,  Chul-Joon Choi

IPC分类号： G06F3/00 ,  G06F13/42

CPC分类号： G06K7/0008 ,  G06K7/10297 ,  G06K19/07

摘要： The present invention provides an integrated circuit chip which includes a processor; a contact pad unit connected to a host through a plurality of contact pads; a host interface detector including at least one pull-up resistor and one pull-down resistor, for selectively connecting the pull-up resistor and the pull-down resistor to the contact pad unit to detect a host interface status; and an interface unit including a plurality of interface protocols, for communicating with the host using a part or all of the plurality of contact pads, wherein the processor receives a status of the host from the host interface detector, identifies a protocol of the host based on the received status of the host, and controls the interface unit so as to enable an interface protocol that is used to communicate with the host.

摘要翻译： 本发明提供一种集成电路芯片，其包括处理器; 接触垫单元，其通过多个接触垫连接到主机; 主机接口检测器，包括至少一个上拉电阻器和一个下拉电阻器，用于选择性地将上拉电阻器和下拉电阻器连接到接触焊盘单元以检测主机接口状态; 以及包括多个接口协议的接口单元，用于使用所述多个接触焊盘中的一部分或全部与所述主机进行通信，其中所述处理器从所述主机接口检测器接收所述主机的状态，识别所述主机的协议 关于主机的接收状态，并控制接口单元，以便启用用于与主机通信的接口协议。

公开(公告)号：US08783576B2

公开(公告)日：2014-07-22

申请号：US11798469

申请日：2007-05-14

申请人： Jong-Sang Choi ,  Seong-Hyun Kim ,  Sung-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Chul-Joon Choi

发明人： Jong-Sang Choi ,  Seong-Hyun Kim ,  Sung-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Chul-Joon Choi

IPC分类号： G06K19/06

CPC分类号： G06K19/077 ,  G06K19/07732

摘要： A method and apparatus for resetting a memory card having a plurality of interfaces and a plurality of function blocks, wherein each function block may be associated with a corresponding interface, may include detecting a reset signal for a selected interface of the plurality of interfaces, and interrupting a function block associated with the selected interface. When the selected interface is the only active interface, all function blocks in the memory card may be reset. If interfaces other than the selected interface are active, only the selected interface may be reset.

摘要翻译： 一种用于复位具有多个接口和多个功能块的存储卡的方法和装置，其中每个功能块可以与对应的接口相关联，可以包括检测多个接口中所选接口的复位信号，以及 中断与所选接口相关联的功能块。 当所选接口是唯一的活动接口时，存储卡中的所有功能块都可能被复位。 如果所选接口以外的接口处于活动状态，则只能选择接口。

公开(公告)号：US07805544B2

公开(公告)日：2010-09-28

申请号：US11880241

申请日：2007-07-20

申请人： Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Jong-Sang Choi ,  Sung-Hyun Kim ,  Chul-Joon Choi

发明人： Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Jong-Sang Choi ,  Sung-Hyun Kim ,  Chul-Joon Choi

IPC分类号： G06F3/00 ,  G06K7/06

CPC分类号： G06K7/0008 ,  G06K7/10297 ,  G06K19/07

摘要： The present invention provides an integrated circuit chip which includes a processor; a contact pad unit connected to a host through a plurality of contact pads; a host interface detector including at least one pull-up resistor and one pull-down resistor, for selectively connecting the pull-up resistor and the pull-down resistor to the contact pad unit to detect a host interface status; and an interface unit including a plurality of interface protocols, for communicating with the host using a part or all of the plurality of contact pads, wherein the processor receives a status of the host from the host interface detector, identifies a protocol of the host based on the received status of the host, and controls the interface unit so as to enable an interface protocol that is used to communicate with the host.

摘要翻译： 本发明提供一种集成电路芯片，其包括处理器; 接触垫单元，其通过多个接触垫连接到主机; 主机接口检测器，包括至少一个上拉电阻器和一个下拉电阻器，用于选择性地将上拉电阻器和下拉电阻器连接到接触焊盘单元以检测主机接口状态; 以及包括多个接口协议的接口单元，用于使用所述多个接触焊盘中的一部分或全部与所述主机进行通信，其中所述处理器从所述主机接口检测器接收所述主机的状态，识别所述主机的协议 关于主机的接收状态，并控制接口单元，以便启用用于与主机通信的接口协议。

公开(公告)号：US08065446B2

公开(公告)日：2011-11-22

申请号：US11608014

申请日：2006-12-07

申请人： Sang-Wook Kang ,  Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon

发明人： Sang-Wook Kang ,  Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon

IPC分类号： G06F3/00

CPC分类号： G06F13/387

摘要： A system, apparatus and method are provided for discerning a host interface, the method including connecting a pull resistor to the interface, sequentially applying a pull voltage to the pull resistor, measuring a loaded electrical characteristic of the interface while the sequentially applied pull voltage is applied to the pull resistor, comparing the loaded electrical characteristic with a predetermined value, and identifying a specification of the interface in accordance with the comparison.

摘要翻译： 提供了一种用于识别主机接口的系统，装置和方法，所述方法包括将拉电阻连接到接口，向拉电阻依次施加拉电压，测量接口的负载电特性，同时顺序施加的拉电压为 施加到拉电阻器，将加载的电特性与预定值进行比较，以及根据比较来识别接口的规格。

公开(公告)号：US20080071940A1

公开(公告)日：2008-03-20

申请号：US11880241

申请日：2007-07-20

申请人： Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Jong-Sang Choi ,  Sung-Hyun Kim ,  Chul-Joon Choi

发明人： Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Jong-Sang Choi ,  Sung-Hyun Kim ,  Chul-Joon Choi

IPC分类号： G06F3/00

CPC分类号： G06K7/0008 ,  G06K7/10297 ,  G06K19/07

摘要： The present invention provides an integrated circuit chip which includes a processor; a contact pad unit connected to a host through a plurality of contact pads; a host interface detector including at least one pull-up resistor and one pull-down resistor, for selectively connecting the pull-up resistor and the pull-down resistor to the contact pad unit to detect a host interface status; and an interface unit including a plurality of interface protocols, for communicating with the host using a part or all of the plurality of contact pads, wherein the processor receives a status of the host from the host interface detector, identifies a protocol of the host based on the received status of the host, and controls the interface unit so as to enable an interface protocol that is used to communicate with the host.

摘要翻译： 本发明提供一种集成电路芯片，其包括处理器; 接触垫单元，其通过多个接触垫连接到主机; 主机接口检测器，包括至少一个上拉电阻器和一个下拉电阻器，用于选择性地将上拉电阻器和下拉电阻器连接到接触焊盘单元以检测主机接口状态; 以及包括多个接口协议的接口单元，用于使用所述多个接触焊盘中的一部分或全部与所述主机进行通信，其中所述处理器从所述主机接口检测器接收所述主机的状态，识别所述主机的协议 关于主机的接收状态，并控制接口单元，以便启用用于与主机通信的接口协议。

公开(公告)号：US20080010406A1

公开(公告)日：2008-01-10

申请号：US11608014

申请日：2006-12-07

申请人： Sang-Wook KANG ,  Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon

发明人： Sang-Wook KANG ,  Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon

IPC分类号： G06F13/28 ,  G06F12/00

CPC分类号： G06F13/387

摘要： A system, apparatus and method are provided for discerning a host interface, the system including a host having at least one interface, a device in signal communication with the at least one interfaces an interface identifier for identifying a specification of the at least one interface, the interface identifier having at least one electrical characteristic sensor in signal communication with the at least one interface, at least two switches coupled to the at least one interface, each switch in signal communication with a corresponding pull resistor coupled to a pull voltage, and a selectable device interface in signal communication with the host for communicating with the host in response to the electrical characteristic sensor the apparatus including an interface identifier having at least two switches coupled to an interface, each switch in signal communication with a corresponding pull resistor coupled to a pull voltage; and the method including connecting at least one pull resistor to the interface, sequentially applying at least one pull voltage to the at least one pull resistor, measuring at least one loaded electrical characteristic of the interface while the sequentially applied at least one pull voltage is applied to the at least one pull resistor, comparing the at least one loaded electrical characteristic with at least one predetermined value, and identifying a specification of the interface in accordance with the comparison.

摘要翻译： 提供了一种用于识别主机接口的系统，装置和方法，所述系统包括具有至少一个接口的主机，与所述至少一个接口进行信号通信的设备，用于识别所述至少一个接口的规范的接口标识符， 所述接口标识符具有与所述至少一个接口信号通信的至少一个电特性传感器，耦合到所述至少一个接口的至少两个开关，每个开关与耦合到拉电压的对应的上拉电阻进行信号通信，以及 可选择的设备接口，与主机进行信号通信，用于响应于电特性传感器与主机通信，该设备包括具有耦合到接口的至少两个开关的接口标识符，每个开关与耦合到 拉电压; 并且所述方法包括将至少一个拉电阻连接到所述接口，顺序地向所述至少一个拉电阻施加至少一个拉电压，以测量所述接口的至少一个加载电特性，同时施加顺序施加的至少一个拉电压 到所述至少一个拉电阻器，将所述至少一个加载的电特性与至少一个预定值进行比较，以及根据所述比较来识别所述接口的规格。

公开(公告)号：US08054972B2

公开(公告)日：2011-11-08

申请号：US11853041

申请日：2007-09-11

申请人： Joong-Chul Yoon ,  Seong-Hyun Kim ,  Sung-hyun Kim ,  Sang-Bum Kim ,  Sang-Wook Kang ,  Chul-Joon Choi ,  Jong-Sang Choi ,  Koon-Han Sohn ,  Byung-Yoon Kang

发明人： Joong-Chul Yoon ,  Seong-Hyun Kim ,  Sung-hyun Kim ,  Sang-Bum Kim ,  Sang-Wook Kang ,  Chul-Joon Choi ,  Jong-Sang Choi ,  Koon-Han Sohn ,  Byung-Yoon Kang

IPC分类号： H04K1/00

CPC分类号： H04L9/0625 ,  H04L9/0877 ,  H04L2209/34

摘要： An encryption processor, for storing encrypted data in a memory chip of a memory card, includes a FIFO memory for sequentially outputting m-bit data in response to a first signal, and an encryption key generator for generating m-bit encrypted keys (m being a positive integer) in response to a second signal and for sequentially outputting the keys in response to a third signal. A logic operator performs a logic operation on the data from the FIFO memory with the keys from the encryption key generator during a data write operation to sequentially encrypt the data. The logic operator performs a logic operation on the encrypted data received from a memory interface with the keys output from the encryption key generator during a data read operation in order to sequentially decode the encrypted data. The second signal is simultaneously generated with one of the write command or the read command.

摘要翻译： 一种加密处理器，用于将加密数据存储在存储卡的存储器芯片中，包括用于响应于第一信号顺序地输出m位数据的FIFO存储器和用于产生m位加密密钥的加密密钥产生器（m为 正整数），并响应于第三信号顺序输出键。 逻辑运算符在数据写入操作期间利用来自加密密钥生成器的密钥从FIFO存储器的数据执行逻辑运算，以顺序加密数据。 在数据读取操作期间，逻辑运算符对从加密密钥生成器输出的密钥从存储器接口接收的加密数据执行逻辑运算，以便对加密的数据进行顺序解码。 第二个信号与写入命令或读取命令之一同时生成。

公开(公告)号：US20080276015A1

公开(公告)日：2008-11-06

申请号：US12175155

申请日：2008-07-17

申请人： Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Jong-Sang Choi ,  Sung-Hyun Kim ,  Chul-Joon Choi

发明人： Seong-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Jong-Sang Choi ,  Sung-Hyun Kim ,  Chul-Joon Choi

IPC分类号： G06F3/00

CPC分类号： G06K7/0008 ,  G06K7/10297 ,  G06K19/07

摘要： The present invention provides an integrated circuit chip which includes a processor; a contact pad unit connected to a host through a plurality of contact pads; a host interface detector including at least one pull-up resistor and one pull-down resistor, for selectively connecting the pull-up resistor and the pull-down resistor to the contact pad unit to detect a host interface status; and an interface unit including a plurality of interface protocols, for communicating with the host using a part or all of the plurality of contact pads, wherein the processor receives a status of the host from the host interface detector, identifies a protocol of the host based on the received status of the host, and controls the interface unit so as to enable an interface protocol that is used to communicate with the host.

摘要翻译： 本发明提供一种集成电路芯片，其包括处理器; 接触垫单元，其通过多个接触垫连接到主机; 主机接口检测器，包括至少一个上拉电阻器和一个下拉电阻器，用于选择性地将上拉电阻器和下拉电阻器连接到接触焊盘单元以检测主机接口状态; 以及包括多个接口协议的接口单元，用于使用所述多个接触焊盘中的一部分或全部与所述主机进行通信，其中所述处理器从所述主机接口检测器接收所述主机的状态，识别所述主机的协议 关于主机的接收状态，并控制接口单元，以便启用用于与主机通信的接口协议。

公开(公告)号：US20080013396A1

公开(公告)日：2008-01-17

申请号：US11798469

申请日：2007-05-14

申请人： Jong-Sang Choi ,  Seong-Hyun Kim ,  Sung-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Chul-Joon Choi

发明人： Jong-Sang Choi ,  Seong-Hyun Kim ,  Sung-Hyun Kim ,  Sang-Bum Kim ,  Joong-Chul Yoon ,  Sang-Wook Kang ,  Chul-Joon Choi

IPC分类号： G11C5/14

CPC分类号： G06K19/077 ,  G06K19/07732

摘要： A method and apparatus for resetting a memory card having a plurality of interfaces and a plurality of function blocks, wherein each function block may be associated with a corresponding interface, may include detecting a reset signal for a selected interface of the plurality of interfaces, and interrupting a function block associated with the selected interface. When the selected interface is the only active interface, all function blocks in the memory card may be reset. If interfaces other than the selected interface are active, only the selected interface may be reset.

摘要翻译： 一种用于复位具有多个接口和多个功能块的存储卡的方法和装置，其中每个功能块可以与对应的接口相关联，可以包括检测所述多个接口中所选接口的复位信号，以及 中断与所选接口相关联的功能块。 当所选接口是唯一的活动接口时，存储卡中的所有功能块都可能被复位。 如果所选接口以外的接口处于活动状态，则只能选择接口。

公开(公告)号：US07306140B2

公开(公告)日：2007-12-11

申请号：US11047570

申请日：2005-02-02

申请人： Kikuchi Takashi ,  Joong-Chul Yoon ,  Jong-Sang Choi

发明人： Kikuchi Takashi ,  Joong-Chul Yoon ,  Jong-Sang Choi

IPC分类号： G06F17/00

CPC分类号： G06F11/10

摘要： An integrated circuit card system and method are disclosed. The integrated circuit card system may include a host and a memory card for storing test data transferred from the host. The host may transfer the test data to the memory card when a processing time of the memory card exceeds a reference time. The memory card may calculate the test data transferred from the host, and the host may read out the calculated test data.

摘要翻译： 公开了一种集成电路卡系统和方法。 集成电路卡系统可以包括用于存储从主机传送的测试数据的主机和存储卡。 当存储卡的处理时间超过参考时间时，主机可以将测试数据传送到存储卡。 存储卡可以计算从主机传送的测试数据，并且主机可以读出计算的测试数据。