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公开(公告)号:US07616520B2
公开(公告)日:2009-11-10
申请号:US11270666
申请日:2005-11-10
申请人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
发明人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
IPC分类号: G11C8/00
CPC分类号: G09G5/39 , G09G2330/021 , G09G2360/122
摘要: An integrated circuit device having a display memory which stores data for at least one frame from among image information displayed in a display panel which has a plurality of scan lines and a plurality of data lines, wherein the display memory includes a plurality of RAM blocks each of which includes first and second RAM block regions; wherein each of the RAM blocks includes a wordline control circuit which controls a plurality of wordlines provided in each of the first and second RAM block regions; wherein the wordline control circuit is disposed between the first and second RAM block regions; wherein the first and second RAM block regions are disposed along a first direction; and wherein the wordlines extend along the first direction.
摘要翻译: 一种具有显示存储器的集成电路装置,其显示在具有多条扫描线和多条数据线的显示面板中显示的图像信息中,存储至少一帧的数据,其中,所述显示存储器包括多个RAM块, 其包括第一和第二RAM块区域; 其中每个所述RAM块包括字线控制电路,所述字线控制电路控制在所述第一和第二RAM块区域中的每一个中提供的多个字线; 其中所述字线控制电路设置在所述第一和第二RAM块区域之间; 其中所述第一和第二RAM块区域沿着第一方向设置; 并且其中所述字线沿着所述第一方向延伸。
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公开(公告)号:US07593270B2
公开(公告)日:2009-09-22
申请号:US11270552
申请日:2005-11-10
申请人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
发明人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
IPC分类号: G11C7/22
CPC分类号: G09G3/3688 , G09G3/3696 , G09G2300/0408 , G09G2310/027
摘要: An integrated circuit device has a display memory which stores data for at least one frame displayed in a display panel which has a plurality of scan lines and a plurality of data lines. The display memory includes a plurality of RAM blocks, each of the RAM blocks including a plurality of wordlines WL, a plurality of bitlines BL, a plurality of memory cells MC, and a data read control circuit. Each of the RAM blocks is disposed along a first direction X in which the bitlines BL extend. The data read control circuit controls data reading so that data for pixels corresponding to the signal lines is read out by N times reading in one horizontal scan period 1H of the display panel (N is an integer larger than 1).
摘要翻译: 集成电路装置具有显示存储器,其存储显示在具有多条扫描线和多条数据线的显示面板中的至少一帧的数据。 显示存储器包括多个RAM块,每个RAM块包括多个字线WL,多个位线BL,多个存储单元MC和数据读取控制电路。 每个RAM块沿着位线BL延伸的第一方向X设置。 数据读取控制电路控制数据读取,使得对应于信号线的像素的数据在显示面板的一个水平扫描周期1H(N是大于1的整数)中读出N次读取。
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公开(公告)号:US07411861B2
公开(公告)日:2008-08-12
申请号:US11270749
申请日:2005-11-10
申请人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
发明人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
IPC分类号: G11C8/00
CPC分类号: G09G3/20 , G09G3/3611 , G09G2300/0426 , G09G2310/027 , G09G2310/0278 , G09G2310/08
摘要: An integrated circuit device includes a RAM block including a plurality of wordlines WL, a plurality of bitlines BL, a plurality of memory cells MC, wordline control circuit, and a data read control circuit, and a data line driver block which drives a plurality of data line groups of a display panel based on data supplied from the RAM block. The data read control circuit reads data for pixels corresponding to the signal lines by N (N is an integer larger than one) times reading in one horizontal scan period 1 H of the display panel. The data line driver block includes first to N-th divided data line driver blocks, each of which drives a different data line group of the data line groups and is disposed along a first direction X in which the bitlines BL extend.
摘要翻译: 集成电路装置包括:RAM块,包括多个字线WL,多个位线BL,多个存储单元MC,字线控制电路和数据读取控制电路;以及数据线驱动器模块,其驱动多个 基于从RAM块提供的数据的显示面板的数据线组。 数据读取控制电路在显示面板的一个水平扫描周期1H中读取数据,读取与信号线相对应的像素的数据,N(N是大于1的整数)。 数据线驱动器块包括第一至第N划分的数据线驱动器块,每个驱动器块驱动数据线组的不同数据线组,沿着位线BL延伸的第一方向X设置。
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公开(公告)号:US20080112254A1
公开(公告)日:2008-05-15
申请号:US12000882
申请日:2007-12-18
申请人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
发明人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
IPC分类号: G11C8/00
CPC分类号: G09G3/20 , G09G3/3611 , G09G2300/0426 , G09G2310/027 , G09G2310/0278 , G09G2310/08
摘要: An integrated circuit device includes: a RAM block including a plurality of wordlines, a plurality of bitlines, a plurality of memory cells, and a wordline control circuit; and a data line driver block which drives a plurality of data line groups of a display panel based on data supplied from the RAM block. The data line driver block includes first to Nth (N is an integer larger than one) divided data line driver blocks, each of the first to Nth divided data line driver blocks driving a different data line group of the data line groups. The wordline control circuit drives an identical wordline N times from among the wordlines in one horizontal scan period of the display panel. The first to Nth divided data line drivers are disposed along a first direction in which the bitlines extend.
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公开(公告)号:US20070002669A1
公开(公告)日:2007-01-04
申请号:US11270547
申请日:2005-11-10
申请人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
发明人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
IPC分类号: G11C8/00
CPC分类号: G09G3/20 , G09G3/3611 , G09G2300/0426 , G09G2310/027 , G09G2310/0278 , G09G2310/08
摘要: An integrated circuit device includes: a RAM block including a plurality of wordlines, a plurality of bitlines, a plurality of memory cells, and a wordline control circuit; and a data line driver block which drives a plurality of data line groups of a display panel based on data supplied from the RAM block. The data line driver block includes first to Nth (N is an integer larger than one) divided data line driver blocks, each of the first to Nth divided data line driver blocks driving a different data line group of the data line groups. The wordline control circuit drives an identical wordline N times from among the wordlines in one horizontal scan period of the display panel. The first to Nth divided data line drivers are disposed along a first direction in which the bitlines extend.
摘要翻译: 集成电路装置包括:包括多个字线的RAM块,多个位线,多个存储单元和字线控制电路; 以及基于从RAM块提供的数据驱动显示面板的多个数据线组的数据线驱动器块。 数据线驱动器块包括第一至第N(N是大于1的整数)分割数据线驱动器块,驱动数据线组的不同数据线组的第一至第N分割数据线驱动器块中的每一个。 字线控制电路在显示面板的一个水平扫描周期中从字线中驱动相同的字线N次。 第一至第N分割数据线驱动器沿着位线延伸的第一方向布置。
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公开(公告)号:US20070001968A1
公开(公告)日:2007-01-04
申请号:US11270546
申请日:2005-11-10
申请人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
发明人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
IPC分类号: G09G3/36
CPC分类号: G09G3/2007 , G09G3/3685 , G09G2360/18
摘要: A display device comprising: a display panel including a plurality of scan lines and a plurality of data lines; and an integrated circuit device including a display memory which stores data for at least one frame displayed in the display panel. The display memory (or RAM block) includes a plurality of wordlines, a plurality of bitlines, and a plurality of memory cells. The integrated circuit device has a side parallel to the scan lines of the display panel, and the bitlines of the display memory extend in a first direction parallel to the side.
摘要翻译: 一种显示装置,包括:显示面板,包括多条扫描线和多条数据线; 以及包括显示存储器的集成电路装置,其存储显示在显示面板中的至少一帧的数据。 显示存储器(或RAM块)包括多个字线,多个位线和多个存储器单元。 集成电路器件具有与显示面板的扫描线平行的一侧,并且显示存储器的位线在与侧面平行的第一方向上延伸。
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公开(公告)号:US07986541B2
公开(公告)日:2011-07-26
申请号:US11270630
申请日:2005-11-10
申请人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
发明人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
IPC分类号: G11C5/06
CPC分类号: G09G3/2007 , G09G2300/0426 , G09G2310/0267 , G09G2310/027 , G11C5/063
摘要: An integrated circuit device has a display memory which stores data for at least one frame displayed in a display panel which has a plurality of scan lines and a plurality of data lines, the display memory includes a plurality of RAM blocks, each of the RAM blocks including a plurality of wordlines, a plurality of bitlines, a plurality of memory cells, and a wordline control circuit, each of the RAM blocks is disposed along a first direction in which the bitlines extend, each of the memory cells has a short side and a long side, the bitlines are formed along a direction in which the long side of the memory cell extends, and the wordlines are formed along a direction in which the short side of the memory cell extends.
摘要翻译: 集成电路装置具有显示存储器,其存储显示在具有多条扫描线和多条数据线的显示面板中的至少一帧的数据,显示存储器包括多个RAM块,每个RAM块 包括多个字线,多个位线,多个存储器单元和字线控制电路,每个RAM块沿着位线延伸的第一方向设置,每个存储单元具有短边和 长边,沿着存储单元的长边延伸的方向形成位线,并且沿着存储单元的短边延伸的方向形成字线。
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公开(公告)号:US20090091580A1
公开(公告)日:2009-04-09
申请号:US12292996
申请日:2008-12-02
申请人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
发明人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
IPC分类号: G09G5/39
CPC分类号: G09G3/3685 , G09G3/20 , G09G3/3611 , G09G5/39 , G09G5/395 , G09G2300/0426 , G09G2310/0218 , G09G2310/027 , G09G2310/0278 , G09G2360/12
摘要: An integrated circuit device having a display memory which stores data for at least one frame from among image information displayed in a display panel which has a plurality of scan lines and a plurality of data lines, the display memory including a plurality of wordlines, a plurality of bitlines, a plurality of memory cells, and a wordline control circuit; and the wordline control circuit selecting an identical wordline N times (N is an integer larger than one) from among the wordlines in one horizontal scan period of the display panel.
摘要翻译: 一种具有显示存储器的集成电路装置,该显示存储器从显示在具有多个扫描线和多条数据线的显示面板中的图像信息中存储至少一帧的数据,所述显示存储器包括多个字线,多个 位线,多个存储单元和字线控制电路; 并且字线控制电路在显示面板的一个水平扫描周期中从字线中选择相同的字线N次(N是大于1的整数)。
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公开(公告)号:US20070002670A1
公开(公告)日:2007-01-04
申请号:US11270549
申请日:2005-11-10
申请人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
发明人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
IPC分类号: G11C8/00
CPC分类号: G09G3/3685 , G09G3/20 , G09G3/3611 , G09G5/39 , G09G5/395 , G09G2300/0426 , G09G2310/0218 , G09G2310/027 , G09G2310/0278 , G09G2360/12
摘要: An integrated circuit device having a display memory which stores data for at least one frame from among image information displayed in a display panel which has a plurality of scan lines and a plurality of data lines, the display memory including a plurality of wordlines, a plurality of bitlines, a plurality of memory cells, and a wordline control circuit; and the wordline control circuit selecting an identical wordline N times (N is an integer larger than one) from among the wordlines in one horizontal scan period of the display panel.
摘要翻译: 一种具有显示存储器的集成电路装置,该显示存储器从显示在具有多个扫描线和多条数据线的显示面板中的图像信息中存储至少一帧的数据,所述显示存储器包括多个字线,多个 位线,多个存储单元和字线控制电路; 并且字线控制电路在显示面板的一个水平扫描周期中从字线中选择相同的字线N次(N是大于1的整数)。
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公开(公告)号:US20070001969A1
公开(公告)日:2007-01-04
申请号:US11270552
申请日:2005-11-10
申请人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
发明人: Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Junichi Karasawa , Satoru Ito
IPC分类号: G09G3/36
CPC分类号: G09G3/3688 , G09G3/3696 , G09G2300/0408 , G09G2310/027
摘要: An integrated circuit device has a display memory which stores data for at least one frame displayed in a display panel which has a plurality of scan lines and a plurality of data lines. The display memory includes a plurality of RAM blocks, each of the RAM blocks including a plurality of wordlines WL, a plurality of bitlines BL, a plurality of memory cells MC, and a data read control circuit. Each of the RAM blocks is disposed along a first direction X in which the bitlines BL extend. The data read control circuit controls data reading so that data for pixels corresponding to the signal lines is read out by N times reading in one horizontal scan period 1H of the display panel (N is an integer larger than 1)
摘要翻译: 集成电路装置具有显示存储器,其存储显示在具有多条扫描线和多条数据线的显示面板中的至少一帧的数据。 显示存储器包括多个RAM块,每个RAM块包括多个字线WL,多个位线BL,多个存储单元MC和数据读取控制电路。 每个RAM块沿着位线BL延伸的第一方向X设置。 数据读取控制电路控制数据读取,使得对应于信号线的像素的数据在显示面板的一个水平扫描周期1H(N是大于1的整数)中读出N次读数,
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