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公开(公告)号：US20100041232A1
公开(公告)日：2010-02-18
申请号：US12460602
申请日：2009-07-21
IPC分类号： H01L21/3205 , H01L21/02
CPC分类号： G06F17/5072 , G06F17/5068 , G06F2217/12 , H01L22/26 , H01L27/0207 , H01L27/11507 , Y02P90/265
摘要： A method of placing a dummy fill layer on a substrate is disclosed (FIG. 2). The method includes identifying a sub-region of the substrate (210). A density of a layer in the sub-region is determined (212). A pattern of the dummy fill layer is selected to produce a predetermined density (216). The selected pattern is placed in the sub-region (208).
摘要翻译： 公开了一种在衬底上放置虚拟填充层的方法（图2）。 该方法包括识别衬底（210）的子区域。 确定子区域中的层的密度（212）。 选择虚拟填充层的图案以产生预定的密度（216）。 所选择的图案被放置在子区域（208）中。
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公开(公告)号：US08883629B2
公开(公告)日：2014-11-11
申请号：US12883741
申请日：2010-09-16
IPC分类号： H01L21/4763 , H01L21/44 , G06F17/50 , H01L27/02 , H01L27/115
CPC分类号： G06F17/5072 , G06F17/5068 , G06F2217/12 , H01L22/26 , H01L27/0207 , H01L27/11507 , Y02P90/265
摘要： A method of placing a dummy fill layer on a substrate is disclosed (FIG. 2). The method includes identifying a sub-region of the substrate (210). A density of a layer in the sub-region is determined (212). A pattern of the dummy fill layer is selected to produce a predetermined density (216). The selected pattern is placed in the sub-region (208).
摘要翻译： 公开了一种在衬底上放置虚拟填充层的方法（图2）。 该方法包括识别衬底（210）的子区域。 确定子区域中的层的密度（212）。 选择虚拟填充层的图案以产生预定的密度（216）。 所选择的图案被放置在子区域（208）中。
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公开(公告)号：US20110004859A1
公开(公告)日：2011-01-06
申请号：US12883741
申请日：2010-09-16
IPC分类号： G06F17/50
CPC分类号： G06F17/5072 , G06F17/5068 , G06F2217/12 , H01L22/26 , H01L27/0207 , H01L27/11507 , Y02P90/265
摘要： A method of placing a dummy fill layer on a substrate is disclosed (FIG. 2). The method includes identifying a sub-region of the substrate (210). A density of a layer in the sub-region is determined (212). A pattern of the dummy fill layer is selected to produce a predetermined density (216). The selected pattern is placed in the sub-region (208).
摘要翻译： 公开了一种在衬底上放置虚拟填充层的方法（图2）。 该方法包括识别衬底（210）的子区域。 确定子区域中的层的密度（212）。 选择虚拟填充层的图案以产生预定的密度（216）。 所选择的图案被放置在子区域（208）中。
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公开(公告)号：US20080122009A1
公开(公告)日：2008-05-29
申请号：US11594601
申请日：2006-11-08
IPC分类号： H01L27/088 , H01L21/8234
CPC分类号： H01L27/0207
摘要： Areas of a semiconductor substrate where semiconductor devices are not to be formed are filled in with dummy active areas. Whole dummy active areas are formed in areas of the semiconductor substrate where semiconductor devices are not to be formed, and partial dummy active areas are formed in areas of the semiconductor substrate where semiconductor devices are not to be formed, but where whole dummy active areas can not be accommodated. The dummy active areas are staggered so as to provide uniform parasitic capacitive coupling to overlying leads regardless of the placement of the leads. The dummy active areas are substantially evenly separated from one another by dividers. The dummy active areas and dividers are formed concurrently with formation of semiconductor devices in non-dummy active areas. The dummy active areas mitigate yield loss by, among other things, providing more uniformity across the substrate, at least with regard to parasitic capacitances and stress and subsequent processing.
摘要翻译： 半导体器件不要形成的半导体衬底区域被虚拟有源区域填充。 在半导体衬底的不要形成半导体器件的区域中形成整个虚拟有源区，并且在半导体衬底的不形成半导体器件的区域中形成部分虚拟有源区，但是整个虚拟有源区可以 不适应 虚拟有源区交错，以便提供均匀的寄生电容耦合到上覆引线，而不管引线的位置如何。 虚拟活动区域通过分隔器基本均匀地彼此分离。 虚拟有源区和分频器与非虚拟有源区中的半导体器件的形成同时形成。 至少在寄生电容和应力以及随后的处理方面，虚拟有源区除其他外，通过提供更均匀的衬底来减轻产量损失。
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公开(公告)号：US07759182B2
公开(公告)日：2010-07-20
申请号：US11594601
申请日：2006-11-08
IPC分类号： H01L21/338
CPC分类号： H01L27/0207
摘要： Areas of a semiconductor substrate where semiconductor devices are not to be formed are filled in with dummy active areas. Whole dummy active areas are formed in areas of the semiconductor substrate where semiconductor devices are not to be formed, and partial dummy active areas are formed in areas of the semiconductor substrate where semiconductor devices are not to be formed, but where whole dummy active areas can not be accommodated. The dummy active areas are staggered so as to provide uniform parasitic capacitive coupling to overlying leads regardless of the placement of the leads. The dummy active areas are substantially evenly separated from one another by dividers. The dummy active areas and dividers are formed concurrently with formation of semiconductor devices in non-dummy active areas. The dummy active areas mitigate yield loss by, among other things, providing more uniformity across the substrate, at least with regard to parasitic capacitances and stress and subsequent processing.
摘要翻译： 半导体器件不要形成的半导体衬底区域被虚拟有源区域填充。 在半导体衬底的不要形成半导体器件的区域中形成整个虚拟有源区，并且在半导体衬底的不形成半导体器件的区域中形成部分虚拟有源区，但是整个虚拟有源区可以 不适应 虚拟有源区交错，以便提供均匀的寄生电容耦合到上覆引线，而不管引线的位置如何。 虚拟活动区域通过分隔器基本均匀地彼此分离。 虚拟有源区和分频器与非虚拟有源区中的半导体器件的形成同时形成。 至少在寄生电容和应力以及随后的处理方面，虚拟有源区除其他外，通过提供更均匀的衬底来减轻产量损失。
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公开(公告)号：US4852083A
公开(公告)日：1989-07-25
申请号：US65231
申请日：1987-06-22
申请人： Jeffrey A. Niehaus , Robert G. Fleck , Stephen Li , Bob D. Strong
发明人： Jeffrey A. Niehaus , Robert G. Fleck , Stephen Li , Bob D. Strong
CPC分类号： H04L12/52
摘要： A digital crossbar switch for switching data from an input/output data bus to an internal data bus and to the same or another input/output data bus which includes a plurality of multiplexer logic units, an m-bit internal data bus coupled to each of said multiplexer logic units where m is an integer, and a plurality of n-bit input/output data buses one connected to each of the multiplexer logic units were n is an integer. The switch further includes an m/n to 1 multiplexer, where m/n is an integer, in each multiplexer logic unit. The m/n to 1 multiplexer has an input control to the internal data bus and an output coupled to a corresponding one of the input/output data buses and is operative in response to a configuration control signal to switch a selected n-bits of data from the internal data bus to the corresponding input/output data bus. A memory storage for storing configuration control signals is coupled to the m/n to 1 multiplexer.
摘要翻译： 一种用于将数据从输入/输出数据总线切换到内部数据总线以及相同或另一输入/输出数据总线的数字交叉开关，该数据总线包括多个多路复用器逻辑单元，m位内部数据总线耦合到 所述复用器逻辑单元，其中m是整数，并且连接到每个多路复用器逻辑单元的多个n位输入/输出数据总线是n是整数。 在每个多路复用器逻辑单元中，开关进一步包括m / n至1复用器，其中m / n是整数。 m / n至1多路复用器具有对内部数据总线的输入控制和耦合到相应的一个输入/输出数据总线的输出，并且响应于配置控制信号操作以切换所选择的n位数据 从内部数据总线到相应的输入/输出数据总线。 用于存储配置控制信号的存储器存储器耦合到m / n到1多路复用器。
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