Semiconductor Device, Wireless Sensor, and Electronic Device
    1.
    发明申请
    Semiconductor Device, Wireless Sensor, and Electronic Device 有权
    半导体器件,无线传感器和电子设备

    公开(公告)号:US20160117584A1

    公开(公告)日:2016-04-28

    申请号:US14920161

    申请日:2015-10-22

    CPC classification number: G06K19/0716 G06K19/0702 G06K19/073 G06K19/07707

    Abstract: To provide a semiconductor device that is capable of displaying data even when a radio signal is not supplied. The semiconductor device includes an antenna, a battery, a sensor, a nonvolatile memory, a first circuit, and a second circuit. Power supplied from the antenna is converted into first power via the first circuit. The battery stores the first power and supplies second power. The sensor performs sensing with the second power. The nonvolatile memory stores analog data acquired by the sensor. The second power is used to store the analog data. The second circuit converts the analog data into digital data with the use of the first power. The nonvolatile memory preferably includes an oxide semiconductor transistor.

    Abstract translation: 提供即使在不提供无线电信号的情况下也能够显示数据的半导体器件。 半导体器件包括天线,电池,传感器,非易失性存储器,第一电路和第二电路。 从天线供电的电源经由第一电路转换为第一电源。 电池存储第一个电源并提供第二个电源。 传感器用第二个电源进行感测。 非易失性存储器存储由传感器获取的模拟数据。 第二个电源用于存储模拟数据。 第二个电路通过使用第一个电源将模拟数据转换成数字数据。 非易失性存储器优选地包括氧化物半导体晶体管。

    SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

    公开(公告)号:US20170092674A1

    公开(公告)日:2017-03-30

    申请号:US15272093

    申请日:2016-09-21

    Abstract: A small semiconductor device suitable for high-speed operation is provided. The semiconductor device includes a first circuit, a global bit line pair for writing, a global bit line pair for reading, and a local bit line pair. The first circuit includes second to fifth circuits. The second to fifth circuits are electrically connected to each other by the local bit line pair. The second circuit functions as a read/write selection switch. The third circuit functions as a working memory that stores 1-bit complementary data temporarily. The fourth circuit has a function of precharging the local bit line pair. The fifth circuit includes n (n is an integer of 2 or more) sixth circuits. The sixth circuits each have a function of retaining 1-bit complementary data written from the third circuit.

    Storage Circuit and Semiconductor Device
    3.
    发明申请

    公开(公告)号:US20160373089A1

    公开(公告)日:2016-12-22

    申请号:US15254373

    申请日:2016-09-01

    CPC classification number: H03K3/012 H03K3/356 H03K3/356104

    Abstract: The storage circuit includes first and second logic circuits, first and second transistors whose channel formation regions include an oxide semiconductor, and a capacitor. The first and second transistors are connected to each other in series, and the capacitor is connected to a connection node of the first and second transistors. The first transistor functions as a switch that controls connection between an output terminal of the first logic circuit and the capacitor. The second transistor functions as a switch that controls connection between the capacitor and an input terminal of the second logic circuit. Clock signals whose phases are inverted from each other are input to gates of the first and second transistors. Since the storage circuit has a small number of transistors and a small number of transistors controlled by the clock signals, the storage circuit is a low-power circuit.

Patent Agency Ranking