公开(公告)号：US20060125396A1

公开(公告)日：2006-06-15

申请号：US11298595

申请日：2005-12-12

申请人： Seong-Hoon Han ,  Young-Cheul Kang ,  Yoon-Soo Han ,  Jung-Hwan Park ,  Dong-Min Kim

发明人： Seong-Hoon Han ,  Young-Cheul Kang ,  Yoon-Soo Han ,  Jung-Hwan Park ,  Dong-Min Kim

IPC分类号： H01J17/49

CPC分类号： H01J11/12 ,  H01J11/36 ,  H01J2211/368

摘要： A plasma display panel including a front substrate, a rear substrate, a display area, a non-display area including a dummy region, and a plurality of rib members is provided. The dummy region includes a first barrier rib region extending along a first direction and including portions of at least some of the plurality of barrier rib members, a second barrier rib region extending along a second direction and including portions of at least some of the plurality of barrier rib members, and at least one sector region. The sector region includes at least one sector barrier rib member extending along a direction other than the first direction and the second direction and connecting at least one portion of at least one of the barrier rib portions in the first barrier rib region to at least one of the barrier rib portions in the second barrier rib region.

公开(公告)号：US07501759B2

公开(公告)日：2009-03-10

申请号：US11298595

申请日：2005-12-12

申请人： Seong-Hoon Han ,  Young-Cheul Kang ,  Yoon-Soo Han ,  Jung-Hwan Park ,  Dong-Min Kim

发明人： Seong-Hoon Han ,  Young-Cheul Kang ,  Yoon-Soo Han ,  Jung-Hwan Park ,  Dong-Min Kim

IPC分类号： H01J17/49

CPC分类号： H01J11/12 ,  H01J11/36 ,  H01J2211/368

摘要： A plasma display panel including a front substrate, a rear substrate, a display area, a non-display area including a dummy region, and a plurality of rib members is provided. The dummy region includes a first barrier rib region extending along a first direction and including portions of at least some of the plurality of barrier rib members, a second barrier rib region extending along a second direction and including portions of at least some of the plurality of barrier rib members, and at least one sector region. The sector region includes at least one sector barrier rib member extending along a direction other than the first direction and the second direction and connecting at least one portion of at least one of the barrier rib portions in the first barrier rib region to at least one of the barrier rib portions in the second barrier rib region.

摘要翻译： 提供了包括前基板，后基板，显示区域，包括虚拟区域的非显示区域和多个肋构件的等离子体显示面板。 虚拟区域包括沿着第一方向延伸并且包括多个隔壁构件中的至少一些的第一阻挡肋区域，第二阻挡肋区域沿着第二方向延伸并且包括多个阻挡肋构件中的至少一些的部分 隔离肋构件和至少一个扇区区域。 扇形区域包括至少一个沿第一方向和第二方向以外的方向延伸的扇形障壁构件，并且将第一隔壁区域中的至少一个障壁部分的至少一部分连接到第一隔壁区域中的至少一个 第二隔壁区域中的隔壁部分。

公开(公告)号：US08102689B2

公开(公告)日：2012-01-24

申请号：US12687971

申请日：2010-01-15

申请人： Min-Ki Hong ,  Sang-Seok Kang ,  Dong-Min Kim

发明人： Min-Ki Hong ,  Sang-Seok Kang ,  Dong-Min Kim

IPC分类号： G11C5/02

CPC分类号： G11C11/4091 ,  G11C11/4097

摘要： A semiconductor memory device having dummy sense amplifiers and a method of utilizing the same are provided. Embodiments of the semiconductor memory device may include at least one dummy cell block including dummy cells and memory cells. Normal bit lines connecting the memory cells in the dummy cell block in a first direction and dummy bit lines connecting the dummy cells in the first direction. A dummy sense amplifier is also included for connecting any two of the normal bit lines and the dummy bit lines. Some of the embodiments may improve the sensing margin and refresh margin in sensing memory cells in the dummy cell, as well as increasing the redundancy efficiency and utilization of the dummy cells.

摘要翻译： 提供了具有虚拟读出放大器的半导体存储器件及其利用方法。 半导体存储器件的实施例可以包括至少一个虚设单元块，其包括虚设单元和存储单元。 在第一方向连接虚拟单元块中的存储单元的正常位线和在第一方向上连接虚设单元的虚拟位线。 还包括虚拟读出放大器，用于连接任何两个正常位线和虚拟位线。 一些实施例可以改善感测虚拟单元中的存储器单元的感测容限和刷新余量，以及提高冗余效率和虚拟单元的利用。

公开(公告)号：US20110243289A1

公开(公告)日：2011-10-06

申请号：US13050277

申请日：2011-03-17

申请人： Ho-Seok Seol ,  Young-Soo Sohn ,  Dong-Min Kim ,  Kwang-Il Park ,  Seung-Jun Bae

发明人： Ho-Seok Seol ,  Young-Soo Sohn ,  Dong-Min Kim ,  Kwang-Il Park ,  Seung-Jun Bae

IPC分类号： H04L7/04

CPC分类号： G11C7/22 ,  G11C7/04 ,  G11C7/222 ,  G11C2207/2254

摘要： A method of tuning a phase of a clock signal includes performing data training on a plurality of data pins through which data are input and output, in synchronization with a data clock signal; determining one of the data pins to be a representative pin; performing clock and data recovery (CDR) on read data of the representative pin; and adjusting a phase of the data clock signal based on the CDR.

摘要翻译： 一种对时钟信号的相位进行调谐的方法包括：与数据时钟信号同步地对输入和输出数据的多个数据引脚进行数据训练; 确定一个数据引脚作为代表性引脚; 在代表引脚的读取数据上执行时钟和数据恢复（CDR）; 以及基于所述CDR调整所述数据时钟信号的相位。

公开(公告)号：US20110150134A1

公开(公告)日：2011-06-23

申请号：US13061331

申请日：2009-09-03

申请人： Kyung-Chul Yoo ,  Bo-Rham Lee ,  Yun-Ju Kwon ,  Dong-Min Kim

发明人： Kyung-Chul Yoo ,  Bo-Rham Lee ,  Yun-Ju Kwon ,  Dong-Min Kim

IPC分类号： H04L27/20 ,  H04L27/04

CPC分类号： H04L27/206 ,  H04L1/0003 ,  H04L1/0041 ,  H04L9/08 ,  H04L25/03866 ,  H04L27/2032 ,  H04L27/36 ,  H04L63/0428

摘要： An apparatus and method for scrambling in a wireless communication system are provided. The apparatus includes a selector, a plurality of scramblers, and a plurality of modulators. The selector selects a scrambling scheme to be applied to a transmission bit stream according to a modulation scheme to be applied to the transmission bit stream. The plurality of scramblers scramble the transmission bit stream according to a scrambling scheme corresponding to each of a plurality of modulation schemes. The plurality of modulators modulate the scrambled transmission bit stream according to the plurality of modulation schemes.

摘要翻译： 提供了一种在无线通信系统中进行加扰的装置和方法。 该装置包括选择器，多个加扰器和多个调制器。 选择器根据要应用于传输比特流的调制方案来选择要应用于传输比特流的加扰方案。 多个加扰器根据对应于多个调制方案中的每一个的加扰方案来对传输比特流进行加密。 多个调制器根据多个调制方案来调制加扰的传输比特流。

公开(公告)号：US20100118633A1

公开(公告)日：2010-05-13

申请号：US12687971

申请日：2010-01-15

申请人： Min-Ki HONG ,  Sang-Seok Kang ,  Dong-Min Kim

发明人： Min-Ki HONG ,  Sang-Seok Kang ,  Dong-Min Kim

IPC分类号： G11C7/02 ,  G11C8/00

CPC分类号： G11C11/4091 ,  G11C11/4097

摘要： A semiconductor memory device having dummy sense amplifiers and a method of utilizing the same are provided. Embodiments of the semiconductor memory device may include at least one dummy cell block including dummy cells and memory cells. Normal bit lines connecting the memory cells in the dummy cell block in a first direction and dummy bit lines connecting the dummy cells in the first direction. A dummy sense amplifier is also included for connecting any two of the normal bit lines and the dummy bit lines. Some of the embodiments may improve the sensing margin and refresh margin in sensing memory cells in the dummy cell, as well as increasing the redundancy efficiency and utilization of the dummy cells.

摘要翻译： 提供了具有虚拟读出放大器的半导体存储器件及其利用方法。 半导体存储器件的实施例可以包括至少一个虚设单元块，其包括虚设单元和存储单元。 在第一方向连接虚拟单元块中的存储单元的正常位线和在第一方向上连接虚设单元的虚拟位线。 还包括虚拟读出放大器，用于连接任何两个正常位线和虚拟位线。 一些实施例可以改善感测虚拟单元中的存储器单元的感测容限和刷新余量，以及提高冗余效率和虚拟单元的利用。

公开(公告)号：US07649760B2

公开(公告)日：2010-01-19

申请号：US11465304

申请日：2006-08-17

申请人： Min-Ki Hong ,  Sang-Seok Kang ,  Dong-Min Kim

发明人： Min-Ki Hong ,  Sang-Seok Kang ,  Dong-Min Kim

IPC分类号： G11C5/02

CPC分类号： G11C11/4091 ,  G11C11/4097

摘要： A semiconductor memory device having dummy sense amplifiers and a method of utilizing the same are provided. Embodiments of the semiconductor memory device may include at least one dummy cell block including dummy cells and memory cells. Normal bit lines connecting the memory cells in the dummy cell block in a first direction and dummy bit lines connecting the dummy cells in the first direction. A dummy sense amplifier is also included for connecting any two of the normal bit lines and the dummy bit lines. Some of the embodiments may improve the sensing margin and refresh margin in sensing memory cells in the dummy cell, as well as increasing the redundancy efficiency and utilization of the dummy cells.

摘要翻译： 提供了具有虚拟读出放大器的半导体存储器件及其利用方法。 半导体存储器件的实施例可以包括至少一个虚设单元块，其包括虚设单元和存储单元。 在第一方向连接虚拟单元块中的存储单元的正常位线和在第一方向上连接虚设单元的虚拟位线。 还包括虚拟读出放大器，用于连接任何两个正常位线和虚拟位线。 一些实施例可以改善感测虚拟单元中的存储器单元的感测容限和刷新余量，以及提高冗余效率和虚拟单元的利用。

公开(公告)号：US20190138473A1

公开(公告)日：2019-05-09

申请号：US16005063

申请日：2018-06-11

申请人： Dong-Min Kim ,  Jeong-woo Park ,  Wook Han Jeong ,  Jin Hwan Choi

发明人： Dong-Min Kim ,  Jeong-woo Park ,  Wook Han Jeong ,  Jin Hwan Choi

IPC分类号： G06F13/26 ,  G06F13/10

CPC分类号： G06F13/26 ,  G06F13/102

摘要： Provided is a semiconductor device and a semiconductor system. A semiconductor device can include a command priority policy manager circuit which generates command priority policy information including a command priority compliance policy for a command directed to a device. A host interface circuit, can be coupled to the command priority policy manager circuit to receive the command priority policy information from the command priority policy manager circuit, where the host interface circuit operable to transmit the command priority policy information via an electrical interface to the device.

公开(公告)号：US09036406B2

公开(公告)日：2015-05-19

申请号：US13832101

申请日：2013-03-15

申请人： Hye-Jin Kim ,  Sang-Kyu Kang ,  Dong-Hyun Sohn ,  Dong-Min Kim ,  Kyu-Chan Lee

发明人： Hye-Jin Kim ,  Sang-Kyu Kang ,  Dong-Hyun Sohn ,  Dong-Min Kim ,  Kyu-Chan Lee

IPC分类号： G11C11/00 ,  G11C11/16 ,  G11C5/14

CPC分类号： G11C11/1675 ,  G11C5/147 ,  G11C11/161 ,  G11C11/1653 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1697

摘要： A MRAM includes a memory cell array of spin-transfer torque magnetic random access memory (STT-MRAM) cells and a source line commonly connected to the plurality of STT-MRAM cells. A source line voltage generator generates a source line driving voltage in response to an external power supply voltage and provides the source line driving voltage to the source line.

摘要翻译： MRAM包括自旋转移转矩磁随机存取存储器（STT-MRAM）单元的存储单元阵列和通常连接到多个STT-MRAM单元的源极线。 源极线电压发生器响应于外部电源电压产生源极线驱动电压，并将源极线驱动电压提供给源极线。

公开(公告)号：US08548092B2

公开(公告)日：2013-10-01

申请号：US13004271

申请日：2011-01-11

申请人： In-Tae Kang ,  Jung-Hwa Bae ,  Jung-Uk Woo ,  Shin-Ho Kim ,  Sang-Min Bae ,  Jong-Han Lim ,  Dong-Min Kim ,  Bo-Rham Lee

发明人： In-Tae Kang ,  Jung-Hwa Bae ,  Jung-Uk Woo ,  Shin-Ho Kim ,  Sang-Min Bae ,  Jong-Han Lim ,  Dong-Min Kim ,  Bo-Rham Lee

IPC分类号： H04K1/02

CPC分类号： H04L27/2624

摘要： A method and apparatus for reducing a Peak to Average Power Ratio (PAPR) using peak windowing is provided. In the apparatus, an absolute value calculator calculates an absolute value of an input signal, a subtractor subtracts a predetermined clipping threshold level from the absolute value, a smoothing unit performs smoothing on the subtracted signal according to a predetermined smoothing scheme and outputs a first smoothed signal, an adder adds the first smoothed signal to the clipping threshold level, an inverse calculator outputs a second smoothed signal by multiplying the clipping threshold level by an inverse of the added signal, and a multiplier outputs a final PAPR-reduced signal by multiplying the input signal by the second smoothed signal. The method and apparatus address an overcompensation problem while processing signals having a large bandwidth and a high data rate without delay, thereby minimizing the clipping influences on Bit Error Rate (BER) and Adjacent Channel Leakage Ratio (ACLR) performances.

摘要翻译： 提供了一种使用峰值窗口降低峰均功率比（PAPR）的方法和装置。 在设备中，绝对值计算器计算输入信号的绝对值，减法器根据绝对值减去预定的限幅阈值电平，平滑单元根据预定的平滑方案对减法信号进行平滑处理，并输出第一个平滑 信号，加法器将第一平滑信号与削波阈值电平相加，逆计算器通过将削波阈值电平乘以相加信号的倒数来输出第二平滑信号，乘法器将最终的PAPR降低信号乘以 输入信号由第二平滑信号。 该方法和装置在不延迟地处理具有大带宽和高数据速率的信号的同时解决过度补偿问题，从而最小化对误码率（BER）和相邻信道泄漏比（ACLR）性能的削波影响。