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    Method for non-volatile memory with worst-case control data management
    4.
    发明申请
    Method for non-volatile memory with worst-case control data management 审中-公开
    用于具有最坏情况控制数据管理的非易失性存储器的方法

    公开(公告)号：US20080091901A1

    公开(公告)日：2008-04-17

    申请号：US11549035

    申请日：2006-10-12

    申请人： Alan David Bennett ,  Neil David Hutchison ,  Sergey Anatolievich Gorobets

    发明人： Alan David Bennett ,  Neil David Hutchison ,  Sergey Anatolievich Gorobets

    IPC分类号： G06F13/00 ,  G06F12/00

    CPC分类号： G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7205

    摘要： In a nonvolatile memory with a block management system, data written to blocks include host write data and also system control data for managing the blocks. When a block is full or no longer accepting data, it is closed after valid versions of the data on it are relocated to another block in a rewrite operation. An improved pre-emptive rewrite scheme prevents a worst-case situation where multiple rewrites to occur at once when they happened to be full at the same time. Particularly, the scheduling of the pre-emptive rewrites for control data is based on a number of considerations including the time required for each control block rewrite and the time available for control block rewrites based on the configuration of the update blocks for storing host data, the time required in the foreground host operation and the host write latency.

    摘要翻译： 在具有块管理系统的非易失性存储器中，写入块的数据包括主机写入数据以及用于管理块的系统控制数据。 当块已满或不再接受数据时，在重写操作中将其上的数据的有效版本重定位到另一个块之后，它将被关闭。 改进的优先重写方案可以防止在同时发生多次重写时立即发生多次重写的最坏情况。 特别地，用于控制数据的优先重写的调度基于多个考虑因素，包括基于用于存储主机数据的更新块的配置，每个控制块重写所需的时间和可用于控制块重写的时间， 前台主机操作所需的时间和主机写入延迟。

    Non-volatile memory with worst-case control data management
    6.
    发明申请
    Non-volatile memory with worst-case control data management 审中-公开
    具有最坏情况控制数据管理的非易失性存储器

    公开(公告)号：US20080091871A1

    公开(公告)日：2008-04-17

    申请号：US11549040

    申请日：2006-10-12

    申请人： Alan David Bennett ,  Neil David Hutchison ,  Sergey Anatolievich Gorobets

    发明人： Alan David Bennett ,  Neil David Hutchison ,  Sergey Anatolievich Gorobets

    IPC分类号： G06F13/00 ,  G06F12/00

    CPC分类号： G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7205

    摘要： In a nonvolatile memory with a block management system, data written to blocks include host write data and also system control data for managing the blocks. When a block is full or no longer accepting data, it is closed after valid versions of the data on it are relocated to another block in a rewrite operation. An improved pre-emptive rewrite scheme prevents a worst-case situation where multiple rewrites to occur at once when they happened to be full at the same time. Particularly, the scheduling of the pre-emptive rewrites for control data is based on a number of considerations including the time required for each control block rewrite and the time available for control block rewrites based on the configuration of the update blocks for storing host data, the time required in the foreground host operation and the host write latency.

    摘要翻译： 在具有块管理系统的非易失性存储器中，写入块的数据包括主机写入数据以及用于管理块的系统控制数据。 当块已满或不再接受数据时，在重写操作中将其上的数据的有效版本重定位到另一个块之后，它将被关闭。 改进的优先重写方案可以防止在同时发生多次重写时立即发生多次重写的最坏情况。 特别地，用于控制数据的优先重写的调度基于多个考虑因素，包括基于用于存储主机数据的更新块的配置，每个控制块重写所需的时间和可用于控制块重写的时间， 前台主机操作所需的时间和主机写入延迟。

    Use of guard bands and phased maintenance operations to avoid exceeding maximum latency requirements in non-volatile memory systems
    7.
    发明授权
    Use of guard bands and phased maintenance operations to avoid exceeding maximum latency requirements in non-volatile memory systems 有权
    使用保护频段和分阶段的维护操作，以避免在非易失性存储器系统中超过最大延迟要求

    公开(公告)号：US08417876B2

    公开(公告)日：2013-04-09

    申请号：US12821759

    申请日：2010-06-23

    申请人： Sergey Anatolievich Gorobets ,  Robert George Young ,  Alan David Bennett

    发明人： Sergey Anatolievich Gorobets ,  Robert George Young ,  Alan David Bennett

    IPC分类号： G06F12/06

    CPC分类号： G06F12/0246 ,  G06F2212/7205

    摘要： Techniques are presented for performing maintenance operations, such as garbage collection, on non-volatile memory systems will still respecting the maximum latency, or time-out, requirements of a protocol. A safety guard band in the space available for storing host data, control data, or both, is provided. If, on an access of the memory, it is determined that the guard band space is exceeded, the system uses a recovery back to the base state by triggering and prioritizing clean-up operations to re-establish all safety guard bands without breaking the timing requirements. To respect these timing requirements, the operations are split into portions and done in a phased manner during allowed latency periods.

    摘要翻译： 提出了用于执行维护操作（例如垃圾收集）的技术，在非易失性存储器系统上仍将遵守协议的最大等待时间或超时要求。 提供了可用于存储主机数据，控制数据或两者的空间中的安全保护带。 如果在存储器的访问上确定超过了保护带空间，则系统通过触发并清除清除操作的优先级将恢复恢复到基本状态，以重新建立所有安全保护带而不破坏时序 要求。 为了遵守这些时序要求，在允许的等待时间期间，操作被分成多个部分并以分阶段的方式完成。

    Data Transfer Flows for On-Chip Folding
    8.
    发明申请
    Data Transfer Flows for On-Chip Folding 有权
    片上折叠数据传输流程

    公开(公告)号：US20110149650A1

    公开(公告)日：2011-06-23

    申请号：US12642649

    申请日：2009-12-18

    申请人： Jianmin Huang ,  Chris Avila ,  Lee M. Gavens ,  Neil David Hutchison ,  Sergey Anatolievich Gorobets

    发明人： Jianmin Huang ,  Chris Avila ,  Lee M. Gavens ,  Neil David Hutchison ,  Sergey Anatolievich Gorobets

    IPC分类号： G11C16/04 ,  G11C14/00

    CPC分类号： G11C11/5628 ,  G06F12/0246 ,  G06F2212/7203 ,  G11C7/1042 ,  G11C16/10 ,  G11C2211/5641 ,  G11C2211/5643

    摘要： A memory system and methods of its operation are presented. The memory system includes a volatile buffer memory and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. When writing data to the non-volatile memory, the data is received from a host, stored in the buffer memory, transferred from the buffer memory to into read/write registers of the non-volatile memory circuit, and then written from the read/write registers to the first section of the non-volatile memory circuit using a binary write operation. Portions of the data and then subsequently folded from the first section of the non-volatile memory to the second section of the non-volatile memory, where a folding operation includes reading the portions of the data from multiple locations in the first section into the read/write registers and performing a multi-state programming operation of the potions of the data from the read/write registers into a location the second section of the non-volatile memory. The multi-state programming operations include a first phase and a second phase and one or more of the binary write operations are performed between the phases of the multi-state programming operations.

    摘要翻译： 介绍了一种存储系统及其操作方法。 存储器系统包括易失性缓冲存储器和非易失性存储器电路，其中非易失性存储器电路具有数据以二进制格式存储的第一部分，以及第二部分， 状态格式。 当将数据写入非易失性存储器时，将数据从存储在缓冲存储器中的主机接收，从缓冲存储器传送到非易失性存储器电路的读/写寄存器，然后从读/ 使用二进制写操作将寄存器写入非易失性存储器电路的第一部分。 然后将数据的部分随后从非易失性存储器的第一部分折叠到非易失性存储器的第二部分，其中折叠操作包括将第一部分中的多个位置的数据的部分读入读取 /写入寄存器，并且将数据从读/写寄存器执行到多状态编程操作到非易失性存储器的第二部分的位置。 多状态编程操作包括第一阶段和第二阶段，并且在多状态编程操作的阶段之间执行二进制写入操作中的一个或多个。

    Adaptive Deterministic Grouping of Blocks into Multi-Block Units
    9.
    发明申请
    Adaptive Deterministic Grouping of Blocks into Multi-Block Units 有权
    块自适应确定性分组成多块单位

    公开(公告)号：US20110191530A1

    公开(公告)日：2011-08-04

    申请号：US13084396

    申请日：2011-04-11

    申请人： Carlos J. Gonzalez ,  Alan Douglas Bryce ,  Sergey Anatolievich Gorobets ,  Alan David Bennett

    发明人： Carlos J. Gonzalez ,  Alan Douglas Bryce ,  Sergey Anatolievich Gorobets ,  Alan David Bennett

    IPC分类号： G06F12/00

    CPC分类号： G11C29/76 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7208 ,  G11C29/808

    摘要： The present invention presents techniques for the linking of physical blocks of a non-volatile memory into composite logical structures or “metablocks”. After determining an initial linking of good physical blocks into metablocks, a record of the linking is maintained in the non-volatile memory where it can be readily accessed when needed. In one set of embodiments, the initially linking is deterministically formed according to an algorithm and can be optimized according to the pattern of any bad blocks in the memory. As additional bad blocks arise, the linking is updated using by replacing the bad blocks in a linking with good blocks, preferably in the same sub-array of the memory as the block that they are replacing.

    摘要翻译： 本发明提出了用于将非易失性存储器的物理块链接到复合逻辑结构或“元区块”中的技术。 在确定好的物理块到元区块的初始链接之后，在非易失性存储器中维护链接的记录，在需要时可以容易地访问。 在一组实施例中，根据算法确定性地形成初始链接，并且可以根据存储器中的任何坏块的模式进行优化。 随着额外的坏块出现，链接被更新，通过替换与优质块链接的坏块，优选地与它们所替换的块相同的存储器子阵列来更新。

    Adaptive Deterministic Grouping of Blocks into Multi-Block Units
    10.
    发明申请
    Adaptive Deterministic Grouping of Blocks into Multi-Block Units 有权
    块自适应确定性分组成多块单位

    公开(公告)号：US20090292944A1

    公开(公告)日：2009-11-26

    申请号：US12512282

    申请日：2009-07-30

    申请人： Carlos J. Gonzalez ,  Alan Douglas Bryce ,  Sergey Anatolievich Gorobets ,  Alan David Bennett

    发明人： Carlos J. Gonzalez ,  Alan Douglas Bryce ,  Sergey Anatolievich Gorobets ,  Alan David Bennett

    IPC分类号： G06F11/20

    CPC分类号： G11C29/76 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7208 ,  G11C29/808

    摘要： The present invention presents techniques for the linking of physical blocks of a non-volatile memory into composite logical structures or “metablocks”. After determining an initial linking of good physical blocks into metablocks, a record of the linking is maintained in the non-volatile memory where it can be readily accessed when needed. In one set of embodiments, the initially linking is deterministically formed according to an algorithm and can be optimized according to the pattern of any bad blocks in the memory. As additional bad blocks arise, the linking is updated using by replacing the bad blocks in a linking with good blocks, preferably in the same sub-array of the memory as the block that they are replacing.

    摘要翻译： 本发明提出了用于将非易失性存储器的物理块链接到复合逻辑结构或“元区块”中的技术。 在确定好的物理块到元区块的初始链接之后，在非易失性存储器中维护链接的记录，在需要时可以容易地访问。 在一组实施例中，根据算法确定性地形成初始链接，并且可以根据存储器中的任何坏块的模式进行优化。 随着额外的坏块出现，链接被更新，通过替换与优质块链接的坏块，优选地与它们所替换的块相同的存储器子阵列来更新。