公开(公告)号：US20180198059A1

公开(公告)日：2018-07-12

申请号：US15666903

申请日：2017-08-02

申请人： Seung Pil KO ,  Kiseok SUH ,  Kilho LEE ,  Daeeun JEONG

发明人： Seung Pil KO ,  Kiseok SUH ,  Kilho LEE ,  Daeeun JEONG

IPC分类号： H01L43/02 ,  H01L23/522 ,  H01L23/528 ,  H01L43/08 ,  H01L27/22 ,  H01L21/768 ,  H01L43/12

CPC分类号： H01L43/02 ,  H01L21/76804 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53238 ,  H01L23/53266 ,  H01L27/222 ,  H01L43/08 ,  H01L43/12

摘要： A device, which may include a semiconductor device, may include a contact plug, a first barrier metal covering a bottom surface of the contact plug and a lower sidewall of the contact plug, such that the first barrier metal exposes an upper sidewall of the contact plug, and an insulation pattern covering the upper sidewall of the contact plug such that the insulation pattern isolates the first barrier metal from exposure. A magnetic tunnel junction pattern may cover a top surface of the contact plug. Each element of the contact plug, the first barrier metal, and the insulation pattern may be in a contact hole of a first interlayer dielectric layer.

公开(公告)号：US20160163369A1

公开(公告)日：2016-06-09

申请号：US14957550

申请日：2015-12-02

申请人： Kilho LEE ,  KyungTae NAM ,  Sung Chul LEE

发明人： Kilho LEE ,  KyungTae NAM ,  Sung Chul LEE

IPC分类号： G11C11/16 ,  H01L43/08 ,  H01L27/22 ,  H01L43/02

CPC分类号： G11C11/161 ,  H01L27/228 ,  H01L43/08 ,  H01L43/12

摘要： Provided is a semiconductor device including magnetic tunnel junctions, which are spaced apart from each other on a substrate, and each of which includes a free magnetic pattern, a first pinned magnetic pattern, and a tunnel barrier pattern therebetween. The semiconductor device further includes a separation structure interposed between the magnetic tunnel junctions. The separation structure includes a second pinned magnetic pattern and a first insulating pattern stacked to each other.

摘要翻译： 提供了一种半导体器件，其包括在衬底上彼此间隔开的磁性隧道结，并且其中每一个包括自由磁性图案，第一钉扎磁性图案和它们之间的隧道屏障图案。 半导体器件还包括插入在磁性隧道结之间的分离结构。 分离结构包括彼此堆叠的第二钉扎磁性图案和第一绝缘图案。

公开(公告)号：US20130221417A1

公开(公告)日：2013-08-29

申请号：US13686212

申请日：2012-11-27

申请人： Kilho LEE ,  Ki Joon KIM ,  Se-Woong PARK

发明人： Kilho LEE ,  Ki Joon KIM ,  Se-Woong PARK

IPC分类号： H01L29/82

CPC分类号： H01L43/12 ,  H01L27/10888 ,  H01L27/222 ,  H01L27/228 ,  H01L29/82

摘要： Memory devices and methods of fabricating the same include a substrate including a cell region and a peripheral circuit region, data storages on the cell region, first bit lines on and coupled to the data storages, first contacts coupled to peripheral transistors on the peripheral circuit region, and second bit lines on and coupled to the first contacts. The second bit lines may each have a lowermost surface lower than a lowermost surface of the data storages.