公开(公告)号：US08976163B2

公开(公告)日：2015-03-10

申请号：US13491430

申请日：2012-06-07

申请人： Daniel A. Villamizar ,  Ahmad Al-Dahle ,  Shafiq M. Jamal

发明人： Daniel A. Villamizar ,  Ahmad Al-Dahle ,  Shafiq M. Jamal

IPC分类号： G06F3/038 ,  G09G5/00

CPC分类号： G06F1/24 ,  G06F3/041

摘要： Systems, devices, and methods for using clock detector circuitry to reduce turn-on time of an electronic display, improve image quality, and reduce operations of a host are provided. In one example, a system may include a host configured to transmit a number of signals and a display driver coupled to the host. The number of signals may include a clock signal and data signals. The display driver is configured to drive a display based at least in part on the data signals. The display driver is also configured to be reset upon detection of the clock signal without waiting for a host-issued reset signal. A clock detect circuit configured to detect the clock signal may be configured to transmit an internal reset signal to reset the display driver without a dedicated host-issued reset signal.

摘要翻译： 提供了使用时钟检测器电路来减少电子显示器的开启时间，提高图像质量和减少主机操作的系统，设备和方法。 在一个示例中，系统可以包括被配置为发送多个信号的主机和耦合到主机的显示驱动器。 信号的数量可以包括时钟信号和数据信号。 显示驱动器被配置为至少部分地基于数据信号来驱动显示器。 显示驱动器还被配置为在检测到时钟信号时被复位，而不等待主机发出的复位信号。 被配置为检测时钟信号的时钟检测电路可以被配置为发送内部复位信号以复位显示驱动器，而不需要专用的主机发出的复位信号。

公开(公告)号：US08890545B2

公开(公告)日：2014-11-18

申请号：US13610729

申请日：2012-09-11

申请人： Shafiq M. Jamal ,  Hopil Bae ,  Sang Y Youn ,  Wei H. Yao

发明人： Shafiq M. Jamal ,  Hopil Bae ,  Sang Y Youn ,  Wei H. Yao

IPC分类号： G01R27/26

CPC分类号： G09G3/3648 ,  G09G3/006 ,  G09G3/3225 ,  G09G2320/02 ,  G09G2320/0209 ,  G09G2320/0693 ,  G09G2330/12 ,  G09G2380/02

摘要： Better performance can be provided for a display system that has semiconductor microelectronic components such as demultiplexors, gate line and data line drivers, and pixel switches formed on the display substrate, e.g., a glass substrate that constitutes part of an active matrix display panel. A gate source capacitance of a constituent transistor of one of these microelectronic components, e.g., a pixel thin film transistor (TFT) that is part of a particular display element, may be measured using a replica component that emulates the behavior of the component.

摘要翻译： 可以提供具有诸如解复用器，栅极线和数据线驱动器之类的半导体微电子部件的显示系统和形成在显示器基板上的像素开关（例如构成有源矩阵显示面板的一部分的玻璃基板）的更好的性能。 这些微电子部件之一的构成晶体管的栅极源极电容，例如作为特定显示元件的一部分的像素薄膜晶体管（TFT）可以使用模拟部件的行为的复制部件来测量。

公开(公告)号：US08803860B2

公开(公告)日：2014-08-12

申请号：US13604580

申请日：2012-09-05

申请人： Shafiq M. Jamal

发明人： Shafiq M. Jamal

IPC分类号： G06F3/038

CPC分类号： G09G3/3648 ,  G09G2320/0219 ,  G09G2330/12

摘要： A display system includes a display panel of pixels, a gate driver and a compensation unit. The gate driver receives a control signal and based on the control signal, generates a gate signal to drive a transistor included in a pixel. The compensation unit measures and compensates for a fall time of the gate driver. The compensation unit includes a replica gate driver, a peak RMS detector, a comparator and a counter. The replica gate driver generates a replica gate signal based on the control signal. The peak RMS detector calculates a peak RMS of the replica gate signal. The comparator compares the peak RMS of the replica gate signal and a reference voltage and generates a comparator value. The counter is controlled by the comparator value to generate a compensation value used to adjust the gate driver and the replica gate driver. Other embodiments are also described and claimed.

摘要翻译： 显示系统包括像素显示面板，栅极驱动器和补偿单元。 栅极驱动器接收控制信号并且基于控制信号，产生栅极信号以驱动包括在像素中的晶体管。 补偿单元测量和补偿门驱动器的下降时间。 补偿单元包括复制栅极驱动器，峰值RMS检测器，比较器和计数器。 复制栅极驱动器基于控制信号产生复制门信号。 峰值RMS检测器计算复制门信号的峰值RMS。 比较器比较复制门信号的峰值RMS和参考电压，并产生比较器值。 计数器由比较器值控制，以产生用于调整栅极驱动器和复制栅极驱动器的补偿值。 还描述和要求保护其他实施例。

公开(公告)号：US20130328851A1

公开(公告)日：2013-12-12

申请号：US13599950

申请日：2012-08-30

申请人： Ahmad Al-Dahle ,  Shafiq M. Jamal

发明人： Ahmad Al-Dahle ,  Shafiq M. Jamal

IPC分类号： G09G5/00 ,  G05F3/02

CPC分类号： G09G3/3696 ,  G09G2300/0426 ,  G09G2330/028

摘要： A system and device for reducing ground bounce in circuitry. Utilization of a common ground supplied to multiple integrated circuits reduces the complexity and costs of producing circuitry but tends to interfere with signal quality within the circuitry by subjecting each integrated circuit to the ground bounce of every other integrated circuit. By introducing a source follower to selectively decouple and/or couple slave circuits within the circuitry, the ground bounce for the overall system can be reduced, thereby increasing the efficiency of interpreting signals within the circuitry.

摘要翻译： 用于减少电路中接地反弹的系统和装置。 利用提供给多个集成电路的公共场地降低了生成电路的复杂性和成本，但是通过使每个集成电路经受每个其他集成电路的地面反弹而趋向于干扰电路内的信号质量。 通过引入源极跟随器来选择性地去耦合和/或耦合电路内的从属电路，可以减小整个系统的接地反弹，从而提高解释电路内的信号的效率。

公开(公告)号：US08582332B2

公开(公告)日：2013-11-12

申请号：US13026938

申请日：2011-02-14

申请人： Ashutosh Verma ,  Shafiq M. Jamal ,  Thomas B. Cho ,  Sehat Sutardja

发明人： Ashutosh Verma ,  Shafiq M. Jamal ,  Thomas B. Cho ,  Sehat Sutardja

IPC分类号： H02M3/07

CPC分类号： H02M3/07 ,  H02M2001/009

摘要： An apparatus includes a first switch coupled to a first voltage reference and a second switch coupled to a second voltage reference. A third switch is coupled to a first terminal of a first capacitor and a first terminal of a second capacitor. A fourth switch is coupled to a second terminal of the first capacitor and the first terminal of the second capacitor. A fifth switch is coupled to the second terminal of the first capacitor and a first terminal of a third capacitor. A sixth switch is coupled to the first terminal of the first capacitor and the first terminal of the third capacitor. The first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the sixth switch are controlled to maintain a first voltage level at a first output and a second voltage level at a second output.

摘要翻译： 一种装置包括耦合到第一电压基准的第一开关和耦合到第二电压基准的第二开关。 第三开关耦合到第一电容器的第一端子和第二电容器的第一端子。 第四开关耦合到第一电容器的第二端子和第二电容器的第一端子。 第五开关耦合到第一电容器的第二端子和第三电容器的第一端子。 第六开关耦合到第一电容器的第一端子和第三电容器的第一端子。 控制第一开关，第二开关，第三开关，第四开关，第五开关和第六开关，以将第一电压电平维持在第一输出，第二电压电平维持在第二输出。

公开(公告)号：US07944277B1

公开(公告)日：2011-05-17

申请号：US12340076

申请日：2008-12-19

申请人： Dennis Sinitsky ,  Shafiq M. Jamal

发明人： Dennis Sinitsky ,  Shafiq M. Jamal

IPC分类号： G05F1/10

CPC分类号： G05F1/56 ,  H02M3/07

摘要： In one embodiment, the present invention includes a circuit for suppressing noise with adaptive charge-pump regulation. The circuit comprises an oscillator circuit, a charge pump, an amplifier, a current mirror, and a filter. The charge-pump receives an oscillating signal and provides an output voltage. The amplifier is responsive to the output voltage and a reference voltage and provides a control signal. The control signal alters a frequency of the oscillator and the output voltage is responsive to this frequency. The current mirror and filter suppress a noise component of the output voltage. The current mirror provides a supply current to a regulator loop. The regulator loop is operable to generate a consistent regulator voltage. In this manner, the adaptive charge-pump allows for a more consistent, noise free, regulator voltage.

摘要翻译： 在一个实施例中，本发明包括用于利用自适应电荷泵调节来抑制噪声的电路。 电路包括振荡电路，电荷泵，放大器，电流镜和滤波器。 电荷泵接收振荡信号并提供输出电压。 放大器响应于输出电压和参考电压，并提供控制信号。 控制信号改变振荡器的频率，并且输出电压响应于该频率。 电流镜和滤波器抑制输出电压的噪声分量。 电流镜向调节器回路提供电源电流。 调节器环路可操作以产生一致的调节器电压。 以这种方式，自适应电荷泵允许更一致，无噪声的调节器电压。

公开(公告)号：US20130328846A1

公开(公告)日：2013-12-12

申请号：US13610703

申请日：2012-09-11

申请人： Shafiq M. Jamal ,  Hopil Bae ,  Sang Y. Youn ,  Wei H. Yao

发明人： Shafiq M. Jamal ,  Hopil Bae ,  Sang Y. Youn ,  Wei H. Yao

IPC分类号： G06F3/038

CPC分类号： G09G3/3225 ,  G06F1/3265 ,  G09G3/006 ,  G09G3/3648 ,  G09G2320/02 ,  G09G2320/0209 ,  G09G2320/0693 ,  G09G2330/12 ,  G09G2380/02 ,  Y02D10/153

摘要： Better performance can be provided for a display system that has semiconductor microelectronic components such as demultiplexors, gate line and data line drivers, and pixel switches formed on the display substrate, e.g., a glass substrate that constitutes part of an active matrix display panel. A constituent transistor of one of these microelectronic components, e.g., a pixel thin film transistor (TFT) that is part of a particular display element, may be characterized using a replica component that emulates the behavior of the component.

摘要翻译： 可以提供具有诸如解复用器，栅极线和数据线驱动器之类的半导体微电子部件的显示系统和形成在显示器基板上的像素开关（例如构成有源矩阵显示面板的一部分的玻璃基板）的更好的性能。 这些微电子部件之一的构成晶体管（例如，作为特定显示元件的一部分的像素薄膜晶体管（TFT））可以使用仿效部件的行为的复制部件来表征。

公开(公告)号：US20130328749A1

公开(公告)日：2013-12-12

申请号：US13592176

申请日：2012-08-22

申请人： Shafiq M. Jamal ,  Yafei Bi ,  Hopil Bae ,  Sang Y. Youn

发明人： Shafiq M. Jamal ,  Yafei Bi ,  Hopil Bae ,  Sang Y. Youn

IPC分类号： G09G3/20

CPC分类号： G09G3/3648 ,  G09G3/3677 ,  G09G2320/0285 ,  G09G2330/025 ,  G09G2330/12

摘要： A display is disclosed that includes a transparent substrate and a plurality of pixel transistors that are formed on the transparent substrate to generate an image for display. A transistor drive circuit is used to drive the pixel transistors to generate the image. The transistor drive circuit may include a gate driver. Further, a test circuit may be used to: adjust voltages that are applied by the gate driver to a pixel transistor; and determine the voltage of the gate driver when a current spike has occurred to the pixel transistor which causes the pixel transistor to turn on. Once this threshold voltage for the gate driver to turn on the pixel transistor has been determined, it may be stored in a storage device for future use by the gate driver. Other embodiments are also described and claimed.

摘要翻译： 公开了一种显示器，其包括透明基板和形成在透明基板上以产生用于显示的图像的多个像素晶体管。 晶体管驱动电路用于驱动像素晶体管以产生图像。 晶体管驱动电路可以包括栅极驱动器。 此外，测试电路可以用于：将由栅极驱动器施加的电压调整到像素晶体管; 并且当使像素晶体管导通的像素晶体管发生电流尖峰时，确定栅极驱动器的电压。 一旦栅极驱动器接通像素晶体管的阈值电压就被确定，它可能被存储在存储器件中以供门驱动器将来使用。 还描述和要求保护其他实施例。

公开(公告)号：US08089304B1

公开(公告)日：2012-01-03

申请号：US12613248

申请日：2009-11-05

申请人： Shafiq M. Jamal

发明人： Shafiq M. Jamal

IPC分类号： H03B19/00

CPC分类号： H03K23/68 ,  G06F7/68

摘要： Frequency division methods and circuits are provided for producing an output clock signal with a frequency related to the frequency of an input clock signal by a predetermined factor. The method and circuit rely on the input clock signal and on feedback from the output signal to produce an intermediate signal. The frequency of the intermediate signal is divided to produce the output clock signal. The method and circuit may be implemented using few circuit components. In an exemplary embodiment, the method and circuit may be used to produce an output clock signal with a frequency that is two-and-a-half times lower than the frequency of the input clock signal.

摘要翻译： 提供了分频方法和电路，用于产生具有与输入时钟信号的频率相关的频率的输出时钟信号预定因子。 该方法和电路依赖于输入时钟信号和来自输出信号的反馈以产生中间信号。 中间信号的频率被分频以产生输出时钟信号。 该方法和电路可以使用很少的电路部件来实现。 在示例性实施例中，该方法和电路可用于产生具有比输入时钟信号的频率低二分之二的频率的输出时钟信号。

公开(公告)号：US07629909B1

公开(公告)日：2009-12-08

申请号：US11836628

申请日：2007-08-09

申请人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal

发明人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal

IPC分类号： H03M1/00

CPC分类号： H03K19/00361 ,  H03K17/162 ,  H03M1/742

摘要： In a circuit to convert a voltage range of a control signal, a first switch selectively couples, based on the control signal, an output node to a first reference voltage when the output node is to be in a first state. A second switch selectively establishes, based on the control signal, a second reference voltage when the output node is to be in a second state, the second state being a logical complement of the first state. A feedback control loop is coupled to the output node to maintain the second reference voltage in response to voltage fluctuation at the output node. The feedback control loop includes a current mirror and a transistor coupled to the current mirror. The transistor is controlled by feedback from the output node to modify a biasing current established by the current mirror to thereby counteract the voltage fluctuation.

摘要翻译： 在转换控制信号的电压范围的电路中，当输出节点处于第一状态时，第一开关基于控制信号将输出节点选择性地耦合到第一参考电压。 当输出节点处于第二状态时，第二开关基于控制信号选择性地建立第二参考电压，第二状态是第一状态的逻辑补码。 反馈控制回路耦合到输出节点以响应于输出节点处的电压波动来维持第二参考电压。 反馈控制回路包括电流镜和耦合到电流镜的晶体管。 晶体管通过来自输出节点的反馈来控制，以修改由电流镜所建立的偏置电流，从而抵消电压波动。