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公开(公告)号：US12107101B2
公开(公告)日：2024-10-01
申请号：US17546740
申请日：2021-12-09
发明人： Kerui Xi , Xuhui Peng , Feng Qin , Tingting Cui , Zhenyu Jia
IPC分类号： H01L27/146 , H01L25/16
CPC分类号： H01L27/14618 , H01L25/167 , H01L27/1462 , H01L27/14627 , H01L27/14636
摘要： The present disclosure provides chip package structure, packaging method, camera module and electronic equipment. The package structure includes chip package module, which includes light-transmitting substrate, wiring layer located on side of light-transmitting substrate and including first metal wire, conductor located on side of wiring layer facing away from light-transmitting substrate, photosensitive chip located on side of wiring layer facing away from the light-transmitting substrate, active chip located on side of wiring layer facing away from light-transmitting substrate, and plastic encapsulation layer encapsulating photosensitive chip and active chip. The conductor includes first end electrically connected to first metal wire, and second end. The photosensitive chip includes pin electrically connected to first metal wire and has photosensitive surface facing towards light-transmitting substrate. The photosensitive surface includes photosensitive region that is not overlapping first metal wire. The active chip includes pin electrically connected to first metal wire.
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2.发明授权公开(公告)号：US11581196B2
公开(公告)日：2023-02-14
申请号：US16913020
申请日：2020-06-26
发明人： Xuhui Peng , Kerui Xi , Tingting Cui , Feng Qin , Jie Zhang
IPC分类号： H01L21/48 , H01L21/56 , H01L23/498 , H01L23/00
摘要： A semiconductor package and a method of forming the semiconductor package are provided. The method includes providing a first substrate, forming a wiring structure containing at least two first wiring layers, disposing a first insulating layer between adjacent two first wiring layers, and patterning the first insulating layer to form a plurality of first through-holes. The adjacent two first wiring layers are electrically connected to each other through the plurality of first through-holes. The method also includes providing at least one semiconductor element each including a plurality of pins. In addition, the method includes disposing the plurality of pins of the each semiconductor element on a side of the wiring structure away from the first substrate. Further, the method includes encapsulating the at least one semiconductor element, and placing a ball on a side of the wiring structure away from the at least one semiconductor element.
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公开(公告)号：US11084033B2
公开(公告)日：2021-08-10
申请号：US16455013
申请日：2019-06-27
发明人： Kerui Xi , Feng Qin , Xiangjian Kong , Jiubin Zhou , Guicai Wang , Yajie Wang , Tingting Cui
摘要： A drive circuit and its drive method, and a panel and its drive method are provided. The drive circuit includes a step-up unit, a plurality of signal input terminals and a signal output terminal, which are electrically connected with each other. The step-up unit includes a first module, a second module, a third module and a first capacitor, which are electrically connected with each other. The first module is configured to transmit a signal of a third signal input terminal to a first electrode of the first capacitor. The second module is configured to transmit a signal of a fourth signal input terminal to a second electrode of the first capacitor. The third module is configured to transmit a signal of the third signal input terminal to the second electrode of the first capacitor, which further increases the signal of the first electrode of the first capacitor.
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公开(公告)号：US11056437B2
公开(公告)日：2021-07-06
申请号：US16457290
申请日：2019-06-28
发明人： Kerui Xi , Feng Qin , Jine Liu , Xiaohe Li , Tingting Cui
IPC分类号： H01L23/538 , H01L23/31 , H01L23/544 , H01L23/00 , H01L21/48 , H01L21/56
摘要： A panel-level chip device and a packaging method for forming the panel-level chip device are provided. The panel-level chip device includes a plurality of first bare chips disposed on a supporting base, and a plurality of first connection pillars. The panel-level chip device also includes a first encapsulation layer, and a first redistribution layer. The first redistribution layer includes a plurality of first redistribution elements and a plurality of second redistribution elements. Further, the panel-level chip device includes a solder ball group including a plurality of first solder balls. First connection pillars having a same electrical signal are electrically connected to each other by a first redistribution element. Each of remaining first connection pillars is electrically connected to one second redistribution element. The one second redistribution element is further electrically connected to a first solder ball of the plurality of first solder balls.
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公开(公告)号：US10699650B1
公开(公告)日：2020-06-30
申请号：US16441668
申请日：2019-06-14
IPC分类号： G09G3/34
摘要： A driving method for an electrowetting panel is provided. The electrowetting panel includes M driving electrodes sequentially arranged along a first direction. The driving method includes providing electrical signals to the M driving electrodes, such that a droplet is acquired from a solution reservoir by the 1st driving electrode, and is driven to move by the M driving electrodes. During a droplet moving period, a pulse width of a driving signal of an mth driving electrode is Wm = ∑ i = 1 m W i , a pulse width of a non-driving signal between an ath driving signal and an (a+1)th driving signal of the mth driving electrode is Zma = ∑ i = m + 1 m + a W i . M, m, and a are positive integers, 1≤m≤M, and M≥3. The end time of the 1st driving signal of the mth driving electrode and the end time of the mth driving signal of the 1st driving electrode are the same.
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公开(公告)号：US11646272B2
公开(公告)日：2023-05-09
申请号：US17330236
申请日：2021-05-25
发明人： Kerui Xi , Feng Qin , Jine Liu , Xiaohe Li , Tingting Cui
IPC分类号： H01L23/538 , H01L21/48 , H01L21/56 , H01L23/31 , H01L23/544 , H01L23/00
CPC分类号： H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/565 , H01L21/568 , H01L23/3128 , H01L23/5383 , H01L23/5386 , H01L23/544 , H01L24/19 , H01L24/20 , H01L2223/54426 , H01L2224/214
摘要： Packaging method for forming the panel-level chip device is provided. The panel-level chip device includes a plurality of first bare chips disposed on a supporting base, and a plurality of first connection pillars. The panel-level chip device also includes a first encapsulation layer, and a first redistribution layer. The first redistribution layer includes a plurality of first redistribution elements and a plurality of second redistribution elements. Further, the panel-level chip device includes a solder ball group including a plurality of first solder balls. First connection pillars having a same electrical signal are electrically connected to each other by a first redistribution element. Each of remaining first connection pillars is electrically connected to one second redistribution element. The one second redistribution element is further electrically connected to a first solder ball of the plurality of first solder balls.
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7.发明授权公开(公告)号：US11222907B2
公开(公告)日：2022-01-11
申请号：US16188621
申请日：2018-11-13
发明人： Kerui Xi , Tingting Cui , Feng Qin , Jine Liu , Xiaohe Li
摘要： In an array substrate, an electronic paper display panel and a drive method thereof, and a display device, a display area includes multiple sub-display areas. A plurality of scanning lines in each sub-display area are electrically insulated from each other, corresponding scanning lines in different sub-display areas are electrically connected to each other and display time of each sub-display area is controlled through control signal lines. When a control chip and a flexible circuit board are employed, only a small number of control chips and/or flexible circuit boards, or even only one control chip and/or one flexible circuit board, may drive multiple sub-display areas to display pictures.
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公开(公告)号：US10317768B2
公开(公告)日：2019-06-11
申请号：US15811680
申请日：2017-11-14
发明人： Kerui Xi , Tingting Cui , Zhaokeng Cao
IPC分类号： G02B26/00 , G02F1/167 , G02F1/1333 , G02F1/1362 , G06F3/0488 , G06F3/041 , G06F3/044
摘要： Disclosed are a display panel and a display device. The display panel includes: an upper substrate, a lower substrate and an electrophoretic layer located between the upper substrate and the lower substrate; wherein, the lower substrate includes a plurality of pixel electrodes arranged in a matrix and a plurality of touch electrodes; the upper substrate includes a common electrode layer, a plurality of openings are provided on the common electrode layer, the maximum aperture of the openings is less than or equal to a space between adjacent pixel electrodes.
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公开(公告)号：US10061455B2
公开(公告)日：2018-08-28
申请号：US15154502
申请日：2016-05-13
发明人： Kerui Xi , Zhaokeng Cao , Tingting Cui
CPC分类号： G06F3/044 , G06F3/0412 , G06F3/0416 , G09G3/20
摘要： An array substrate, a display panel, and a display device are provided. The array substrate comprises a touch circuit including a plurality of first switching units, a controlling unit, and a plurality of touch detecting terminals, and a plurality of independent touch electrodes arranged in an array. The touch electrode is electrically connected to the touch detecting terminal through at least one first switching unit. When the array substrate is in a touch detecting stage, the controlling unit controls the first switching units to be turned on, such that the touch electrodes are progressively detected.
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公开(公告)号：US10013938B2
公开(公告)日：2018-07-03
申请号：US15184165
申请日：2016-06-16
发明人： Kerui Xi , Tingting Cui
CPC分类号： G09G3/3648 , G02F1/133 , G02F1/133512 , G02F1/133514 , G02F2201/52 , G09G3/2003 , G09G3/3607 , G09G2300/0426
摘要： A display panel includes an array substrate and a color film substrate. The array substrate includes a plurality of pixel groups each including at least two sub-pixels, and a plurality of electrodes configured to provide driving electric fields for display of each sub-pixel. On the array substrate, neighboring pixel groups form a plurality of first gaps extending along a first direction and a plurality of second gaps extending along a second direction. The color film substrate includes a black matrix and a plurality of color filters. The black matrix shields the first gaps and the second gaps but non-overlaps with gaps between neighboring sub-pixels in a same pixel group. A distance from an edge of an electrode corresponding to a sub-pixel to an edge of a color filter corresponding to the same sub-pixel along a direction parallel to the array substrate is greater than or equal to a pre-determined distance.
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