公开(公告)号：US06605481B1

公开(公告)日：2003-08-12

申请号：US10094487

申请日：2002-03-08

申请人： Shao-Po Wu ,  Seonghun Cho ,  Yu-Yu Chou

发明人： Shao-Po Wu ,  Seonghun Cho ,  Yu-Yu Chou

IPC分类号： H01L2166

CPC分类号： G03F7/70466 ,  G03F1/26

摘要： One embodiment of the invention provides a method that facilitates selectively varying how much of a layout of an integrated circuit is defined by phase shifters during an optical lithography process used in manufacturing the integrated circuit. During operation, the method receives a specification of the layout of the integrated circuit. The method then assigns features within the layout to zones associated with different phase shifting priorities. Next, the method generates a phase shifter placement by placing phase shifters comprised of phase shifting geometries onto a phase shifting mask to define the features within the layout, wherein the phase shifter placement is subject to coloring constraints. Note that in general there is no restriction on the order of zone placement. During this placement process, if coloring constraints cannot be satisfied, the method resolves conflicts and/or removes features from being phase-shifted based upon phase shifting priorities of the zones.

摘要翻译： 本发明的一个实施例提供了一种方法，其有助于选择性地改变在用于制造集成电路的光学光刻过程中由移相器定义多少集成电路的布局。 在操作过程中，该方法接收集成电路布局的规格。 然后，该方法将布局内的特征分配给与不同相移优先级相关联的区域。 接下来，该方法通过将包括相移几何的移相器放置在相移掩模上来产生移相器放置，以定义布局内的特征，其中移相器放置受到着色约束。 注意，一般来说，区域布置顺序没有限制。 在该放置过程中，如果不能满足着色约束，则该方法基于区域的相移优先级来解决冲突和/或去除特征被相移。

公开(公告)号：US06698007B2

公开(公告)日：2004-02-24

申请号：US09975414

申请日：2001-10-09

申请人： Shao-Po Wu ,  Seonghun Cho ,  Alexandre Arkhipov ,  Ilya Grishashvili

发明人： Shao-Po Wu ,  Seonghun Cho ,  Alexandre Arkhipov ,  Ilya Grishashvili

IPC分类号： G06F1750

CPC分类号： G03F1/30

摘要： One embodiment of the invention provides a system that automatically resolves conflicts between phase shifters during creation of a phase shifting mask to be used in an optical lithography process for manufacturing an integrated circuit. Upon receiving a specification of a layout on the integrated circuit, the system identifies critical-dimension features within the layout. Next, the system places phase shifters comprised of phase shifting geometries on the phase shifting mask to precisely define the critical-dimension features. In doing so, the system identifies junctions within and/or between the critical-dimension features, and removes phase shifting geometries associated with the junctions to obviate coloring conflicts between phase shifters on the phase shifting mask. In one embodiment of the invention, the junctions include T-junctions and/or L-junctions.

摘要翻译： 本发明的一个实施例提供了一种系统，其在创建用于制造集成电路的光学光刻工艺中使用的相移掩模期间自动地解决移相器之间的冲突。 在接收到集成电路上的布局规范之后，系统识别布局内的关键维度特征。 接下来，该系统将由相移几何形状组成的移相器放置在相移掩模上以精确地定义关键维度特征。 在这样做时，系统识别临界尺寸特征之内和/或之间的结，并消除与结点相关联的相移几何，以消除相移掩模上移相器之间的着色冲突。 在本发明的一个实施方案中，连接包括T结和/或L结。

公开(公告)号：US07216331B2

公开(公告)日：2007-05-08

申请号：US10981343

申请日：2004-11-03

申请人： Shao-Po Wu ,  Seonghun Cho ,  Yao-Ting Wang

发明人： Shao-Po Wu ,  Seonghun Cho ,  Yao-Ting Wang

IPC分类号： G06F17/50

CPC分类号： G03F1/30

摘要： A method of assigning phases to shifters on a layout is provided. The method includes creating a link between any two shifters within a predetermined distance from each other. In one embodiment, the predetermined distance is larger than a minimum feature size on the layout, and smaller than a combined minimum pitch and regulator width. A weight can be assigned to each created link. Phases can be assigned to the shifters, wherein if a phase-shift conflict exists on the layout, then one or more links can be broken based on their weight.

摘要翻译： 提供了一种在布局上为移位器分配相位的方法。 该方法包括在彼此之间的预定距离内创建任何两个移位器之间的链接。 在一个实施例中，预定距离大于布局上的最小特征尺寸，并且小于组合的最小间距和调节器宽度。 可以将权重分配给每个创建的链接。 可以将相位分配给移位器，其中如果在布局上存在相移冲突，则可以基于它们的权重来断开一个或多个链路。

公开(公告)号：US06901575B2

公开(公告)日：2005-05-31

申请号：US10012069

申请日：2001-12-05

申请人： Shao-Po Wu ,  Seonghun Cho ,  Yao-Ting Wang

发明人： Shao-Po Wu ,  Seonghun Cho ,  Yao-Ting Wang

IPC分类号： G03F1/00 ,  G06F17/50 ,  G03F9/00

CPC分类号： G03F1/30

摘要： A method of assigning phases to shifters on a layout is provided. The method includes creating a link between any two shifters within a predetermined distance from each other. In one embodiment, the predetermined distance is larger than a minimum feature size on the layout, and smaller than a combined minimum pitch and regulator width. A weight can be assigned to each created link. Phases can be assigned to the shifters, wherein if a phase-shift conflict exists on the layout, then one or more links can be broken based on their weight.

公开(公告)号：US20050060682A1

公开(公告)日：2005-03-17

申请号：US10981343

申请日：2004-11-03

申请人： Shao-Po Wu ,  Seonghun Cho ,  Yao-Ting Wang

发明人： Shao-Po Wu ,  Seonghun Cho ,  Yao-Ting Wang

IPC分类号： G03F1/00 ,  G06F17/50 ,  G03F9/00 ,  G06F19/00 ,  G21K5/00

CPC分类号： G03F1/30

摘要： A method of assigning phases to shifters on a layout is provided. The method includes creating a link between any two shifters within a predetermined distance from each other. In one embodiment, the predetermined distance is larger than a minimum feature size on the layout, and smaller than a combined minimum pitch and regulator width. A weight can be assigned to each created link. Phases can be assigned to the shifters, wherein if a phase-shift conflict exists on the layout, then one or more links can be broken based on their weight.

摘要翻译： 提供了一种在布局上为移位器分配相位的方法。 该方法包括在彼此之间的预定距离内创建任何两个移位器之间的链接。 在一个实施例中，预定距离大于布局上的最小特征尺寸，并且小于组合的最小间距和调节器宽度。 可以将权重分配给每个创建的链接。 可以将相位分配给移位器，其中如果在布局上存在相移冲突，则可以基于它们的权重来断开一个或多个链路。

公开(公告)号：US06593038B2

公开(公告)日：2003-07-15

申请号：US09876307

申请日：2001-06-06

申请人： Seonghun Cho ,  Shao-Po Wu

发明人： Seonghun Cho ,  Shao-Po Wu

IPC分类号： G03F900

CPC分类号： G03F1/30 ,  G03F1/70

摘要： One embodiment of the invention provides a system for generating trim to be used in conjunction with phase shifters during an optical lithography process for manufacturing an integrated circuit. The system operates by identifying a feature within the integrated circuit to be created by using a phase shifter to produce a region of destructive light interference on a photoresist layer. Next, the system generates the phase shifter for a first mask, while ensuring that design rules are satisfied in defining dimensions for the phase shifter. After the phase shifter is generated, the system generates trim within a second mask, that is used in conjunction with the first mask, by deriving the trim from the previously-defined dimensions of the phase shifter while ensuring that the design rules are satisfied. Note that the design rules can be satisfied by cutting and/or patching portions of the phase shifter and associated trim.

公开(公告)号：US06569583B2

公开(公告)日：2003-05-27

申请号：US09876306

申请日：2001-06-06

申请人： Seonghun Cho ,  Shao-Po Wu

发明人： Seonghun Cho ,  Shao-Po Wu

IPC分类号： G03F900

CPC分类号： G03F1/30

摘要： One embodiment of the invention provides a method and a system for using phase shifter cutbacks to resolve conflicts between phase shifters during creation of a mask to be used in an optical lithography process for manufacturing an integrated circuit. The system works by locating a plurality of phase shifters, including a first phase shifter and a second phase shifter, on a phase shifting mask, and then identifying a conflict area wherein a conflict is likely to occur between the first phase shifter and the second phase shifter on the phase shifting mask. The system resolves this conflict by cutting back one or both of the first phase shifter and the second phase shifter, so that the first phase shifter and the second phase shifter do not interfere with each other in the conflict area.

公开(公告)号：US20100107133A1

公开(公告)日：2010-04-29

申请号：US12288793

申请日：2008-10-23

申请人： O. Samuel Nakagawa ,  Shao-Po Wu

发明人： O. Samuel Nakagawa ,  Shao-Po Wu

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/12 ,  Y02P90/265

摘要： A method of making instances of a reference cell more uniform across an integrated circuit (IC) by providing a nominal cell for the reference cell and modifying an initial IC layout description to create input into an Optical Proximity Correction (OPC) engine, so as to make the cell instances more like the nominal cell during an IC layout process.

摘要翻译： 一种通过提供用于参考单元的标称单元并修改初始IC布局描述以将输入创建到光学邻近校正（OPC）引擎中，通过集成电路（IC）制造参考单元的实例更均匀的方法，以便 在IC布局过程中，使单元格实例更像是标称单元格。

公开(公告)号：US07085698B2

公开(公告)日：2006-08-01

申请号：US10025414

申请日：2001-12-18

申请人： Chi-Ming Tsai ,  Shao-Po Wu

发明人： Chi-Ming Tsai ,  Shao-Po Wu

IPC分类号： G06F17/50

CPC分类号： G06F17/5081

摘要： A method of generating simulation reports regarding an integrated circuit layout is provided. The method can include providing a plurality of control points associated with the integrated circuit layout. A single simulation of the plurality of control points can be performed. Detailed information from the single simulation can be stored in a database. Desired information can then be extracted from the database to generate the simulation reports.

公开(公告)号：US07827518B2

公开(公告)日：2010-11-02

申请号：US11766047

申请日：2007-06-20

申请人： Shao-Po Wu ,  Yao-Ting Wang

发明人： Shao-Po Wu ,  Yao-Ting Wang

IPC分类号： G06F17/50

CPC分类号： G03F1/30 ,  G06F17/5081 ,  G06F2217/12 ,  Y02P90/265

摘要： Phase shifting allows generating very narrow features in a printed features layer. Thus, forming a fabrication layout for a physical design layout having critical features typically includes providing a layout for shifters. Specifically, pairs of shifters can be placed to define critical features, wherein the pairs of shifters conform to predetermined design rules. After placement, phase information for the shifters associated with the set of critical features can be assigned. Complex designs can lead to phase-shift conflicts among shifters in the fabrication layout. An irresolvable conflict can be passed to the design process earlier than in a conventional processes, thereby saving valuable time in the fabrication process for printed circuits.

摘要翻译： 相移允许在打印的要素图层中生成非常窄的特征。 因此，形成具有关键特征的物理设计布局的制造布局通常包括为移位器提供布局。 具体地，可以放置移位器对以定义关键特征，其中移位器对符合预定的设计规则。 放置后，可以分配与该组关键特征相关联的移位器的相位信息。 复杂的设计可能导致制造布局中移位器之间的相移冲突。 可以比传统方法更早地将设计过程传递给设计过程，从而节省印刷电路制造过程中的宝贵时间。