公开(公告)号：US11922875B2

公开(公告)日：2024-03-05

申请号：US17791588

申请日：2020-01-31

Applicant: Sharp Kabushiki Kaisha

Inventor： Kohhei Tanaka

IPC: G09G3/3233 ,  G09G3/3266 ,  G09G3/3291

CPC classification number: G09G3/3233 ,  G09G3/3266 ,  G09G3/3291 ,  G09G2300/0842 ,  G09G2320/0247 ,  G09G2330/021

Abstract: The present application discloses a display device capable of performing favorable display in which flicker is not visually recognized while the power consumption of a scanning-side drive circuit, as well as a data-side drive circuit, can be reduced sufficiently when pause driving is performed. A pixel circuit including emission control transistors M5, M6 in addition to a drive transistor M1 includes a switching element that is turned on based on a voltage of an emission control line Ei to initialize an organic EL element OL when the voltage of the emission control line Ei is at a level for turning off the emission control transistors M5, M6. For example, in some embodiments, the anode electrode of the organic EL element OL is connected to an initialization voltage line Vini via an N-channel transistor M7 serving as the switching element, and the emission control line Ei is connected to the gate terminal of the transistor M7. In the pixel circuit, the transistors M1, M5, M6, and the like except for the transistor M7 are all P-channel transistors.

公开(公告)号：US11170719B1

公开(公告)日：2021-11-09

申请号：US17117476

申请日：2020-12-10

Applicant: Sharp Kabushiki Kaisha

Inventor： Tong Lu ,  Kohhei Tanaka

IPC: G09G3/30 ,  G09G3/3258 ,  G09G3/3291 ,  H01L27/32 ,  G09G3/20

Abstract: An enhanced pixel circuit for a display device provides separate compensation and data programming phases to permit minimization of the programming time. Variations in voltage supplies are accounted for by isolating the drive transistor from such power supply by using a second drive transistor configured as source follower relative to the first drive transistor. An on bias stress transistor is incorporated that can electrically connect the first drive transistor to the power supply during an on bias stress operation. During such operation, a voltage stress is applied to eliminate hysteresis effects associated with the drive transistor. The on bias stress operation may be performed as part of a refresh operation during which a data voltage is programmed to the pixel circuit, or as part of a low frequency operation during which a previously programming data voltage is maintained which reduces power consumption.

公开(公告)号：US09520097B2

公开(公告)日：2016-12-13

申请号：US14351613

申请日：2012-10-31

Applicant: Sharp Kabushiki Kaisha

Inventor： Yutaka Takamaru ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kaoru Yamamoto ,  Kohhei Tanaka ,  Seiichi Uchida ,  Noriaki Yamaguchi ,  Shigeyasu Mori

IPC: G09G3/36 ,  G09G3/34

CPC classification number: G09G3/3648 ,  G09G3/3406 ,  G09G3/3614 ,  G09G2310/0237 ,  G09G2320/0247 ,  G09G2320/0626 ,  G09G2360/16

Abstract: In a display control circuit (200) of a display device, an image pattern detection portion (230) detects whether an image is an anti-flicker pattern or not, and when it is an anti-flicker pattern, a backlight source is driven (typically, such that its luminance changes in the opposite phase relative to luminance changes that would occur), on the basis of predicted values, which are predetermined so as to compensate for the luminance changes that would occur. Moreover, the backlight is not turned on during the scanning period. As a result, flicker due to current leakage, etc., can be reduced or eliminated in a display device for which a scanning period and a scan stop period are set.

Abstract translation: 在显示装置的显示控制电路（200）中，图像图案检测部（230）检测图像是否为防闪烁图案，并且当其为防闪烁图案时，驱动背光源（ 通常，使得其亮度相对于将发生的亮度变化在相反相位变化），基于预定值，预测值来补偿将发生的亮度变化。 此外，在扫描期间背光源未被接通。 结果，在设置了扫描期间和扫描停止期间的显示装置中，可以减少或消除由于电流泄漏等引起的闪烁。

公开(公告)号：US09513753B2

公开(公告)日：2016-12-06

申请号：US14366312

申请日：2012-12-14

Applicant: Sharp Kabushiki Kaisha

Inventor： Yasuhiro Sugita ,  Kazutoshi Kida ,  Kohhei Tanaka

IPC: G06F3/044 ,  G02F1/1333 ,  G06F3/041 ,  G06F3/042 ,  G09G3/36

CPC classification number: G06F3/044 ,  G02F1/13338 ,  G06F3/0412 ,  G06F3/042 ,  G09G3/3648

Abstract: There is provided a touch-sensor-embedded display panel with reduced decrease in aperture ratio and reduced increase in frame area, with lowered power consumption and improved operation performance.A driving pixel (21) is constituted by: a thin film transistor (T1); a pixel electrode (Epix1); a driving common electrode (COM1); and a liquid crystal capacitance (Clc1) which is formed between the pixel electrode (Epix1) and the driving common electrode (COM1). A sensing pixel (22) is constituted by a thin film transistor (T2), a pixel electrode (Epix2), a sensing common electrode (COM2), and a liquid crystal capacitance (Clc2) which is formed between the pixel electrode (Epix2) and the sensing common electrode (COM2). Neither the driving pixel (21) nor the sensing pixel (22) include an auxiliary capacitance. The thin film transistors (T1, T2) have their channel layers formed of IGZO.

Abstract translation: 驱动像素（21）由薄膜晶体管（T1）构成。 像素电极（Epix1）; 驱动公共电极（COM1）; 以及形成在像素电极（Epix1）和驱动公共电极（COM1）之间的液晶电容（Clc1）。 感测像素（22）由形成在像素电极（Epix2）之间的薄膜晶体管（T2），像素电极（Epix2），感测公共电极（COM2）和液晶电容（Clc2） 和感测公共电极（COM2）。 驱动像素（21）和感测像素（22）都不包括辅助电容。 薄膜晶体管（T1，T2）的沟道层由IGZO形成。

公开(公告)号：US09494832B2

公开(公告)日：2016-11-15

申请号：US14414391

申请日：2013-07-16

Applicant: Sharp Kabushiki Kaisha

Inventor： Yosuke Iwata ,  Mitsuhiro Murata ,  Kohhei Tanaka ,  Akihito Jinda ,  Hidefumi Yoshida

IPC: G02F1/1343 ,  G09G3/36 ,  G02F1/1333 ,  G02F1/1337 ,  G02F1/137

CPC classification number: G02F1/134309 ,  G02F1/133345 ,  G02F1/1337 ,  G02F2001/133742 ,  G02F2001/133773 ,  G02F2001/134381 ,  G02F2001/13712 ,  G09G3/36 ,  G09G2300/0447

Abstract: Provided is a liquid crystal display device having excellent viewing angle characteristics and high contrast in a display mode using both a vertical electric field and a horizontal electric field. This liquid crystal display device is provided with a first substrate and a second substrate disposed facing each other, and a liquid crystal layer held between said first and second substrates. The liquid crystal layer contains liquid crystal molecules having a negative dielectric anisotropy. The first substrate is provided with a flat plate first electrode, a first insulating layer, and a second electrode provided in a layer other than that of the first electrode and provided separated from the first electrode by the first insulating layer. The second electrode has multiple comb-tooth sections and multiple slits, and the second substrate has a flat plate third electrode. Defining V1 as the potential difference between the first electrode and the third electrode, V2 as the potential difference between the first electrode and the second electrode, and V2_B as the potential difference between the first electrode and the second electrode when the lowest gradation is showed, V1, V2 and V2_B satisfy 0

Abstract translation: 提供一种液晶显示装置，其在使用垂直电场和水平电场的显示模式中具有优异的视角特性和高对比度。 该液晶显示装置设置有彼此相对配置的第一基板和第二基板，以及保持在所述第一基板和第二基板之间的液晶层。 液晶层含有具有负介电各向异性的液晶分子。 第一基板设置有平板第一电极，第一绝缘层和设置在除了第一电极之外的层中的第二电极，并且通过第一绝缘层与第一电极分离设置。 第二电极具有多个梳齿部和多个狭缝，第二基板具有平板第三电极。 将V1定义为第一电极和第三电极之间的电位差，V2作为第一电极和第二电极之间的电位差，V2_B作为当显示最低等级时的第一电极和第二电极之间的电位差， V1，V2和V2_B满足0 <| V2_B |≤| V2 | <| V1 |。

公开(公告)号：US11910671B2

公开(公告)日：2024-02-20

申请号：US17436537

申请日：2019-03-28

Applicant: SHARP KABUSHIKI KAISHA

Inventor： Keiichi Yamamoto ,  Kohhei Tanaka ,  Takayuki Nishiyama

IPC: H01L23/00 ,  H10K59/131 ,  G09G3/3266 ,  G09G3/3275 ,  H10K59/121

CPC classification number: H10K59/131 ,  G09G3/3266 ,  G09G3/3275 ,  H10K59/1213 ,  H10K59/1216 ,  G09G2310/0278

Abstract: With respect to a display device having an external compensation function, a monitor time can be shortened without increasing the number of wiring lines. A pixel circuit in an i-th row and a j-th column includes an organic EL element (display element), a writing control transistor, a drive transistor, a monitor control transistor, and a holding capacitor. A control terminal of the drive transistor is connected to a data signal line S(j) in the j-th column via the write control transistor. The monitor control transistor includes a first conduction terminal connected to a second conduction terminal of the drive transistor, and a second conduction terminal connected to a data signal line S(j+1) in a (j+1)-th column.

公开(公告)号：US11226529B2

公开(公告)日：2022-01-18

申请号：US16935239

申请日：2020-07-22

Applicant: Sharp Kabushiki Kaisha

Inventor： Keisuke Yoshida ,  Kohhei Tanaka

IPC: G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  G02F1/1333 ,  G02F1/1339 ,  G02F1/1335 ,  G02F1/1337

Abstract: A liquid crystal display device includes an active matrix substrate, a counter substrate, and a liquid crystal layer. The active matrix substrate includes a top gate type oxide semiconductor TFT a plurality of gate wiring lines a plurality of source and an interlayer insulating layer The counter substrate includes a plurality of columnar spacers provided on a second substrate. Each columnar spacer is disposed in an intersecting region where the gate wiring line and the source wiring line intersect. A front face of the active matrix substrate on the liquid crystal layer side includes a plurality of first ridges overlapping the plurality of gate wiring lines and a plurality of second ridges overlapping the plurality of source wiring lines.

公开(公告)号：US11131895B2

公开(公告)日：2021-09-28

申请号：US16810979

申请日：2020-03-06

Applicant: Sharp Kabushiki Kaisha

Inventor： Kohhei Tanaka

IPC: G02F1/1368 ,  G02F1/1362 ,  G02F1/1333 ,  G02F1/1343 ,  H01L27/32 ,  H01L51/52 ,  H01L27/12 ,  H01L29/24 ,  H01L29/786

Abstract: A display device includes: an active matrix substrate including pixels arrayed in a matrix shape including rows and columns, and scanning wiring lines extending in a row direction and signal wiring lines extending in a column direction, wherein the active matrix substrate includes, in each of pixels, a TFT, a pixel electrode formed of a transparent conductive material and electrically connected to the TFT, a color filter located between the TFT and the pixel electrode, and a connecting electrode formed of a transparent conductive material and electrically connecting the TFT to the pixel electrode, the color filter includes a first color filter layer provided on the TFT and including a first contact hole, and a second color filter layer provided on the first color filter layer and including a second contact hole, and the first contact hole and the second contact hole do not overlap with each other.

公开(公告)号：US10679578B2

公开(公告)日：2020-06-09

申请号：US16147414

申请日：2018-09-28

Applicant: SHARP KABUSHIKI KAISHA

Inventor： Kohhei Tanaka ,  Kaoru Yamamoto ,  Tokihiro Yokono

IPC: G09G3/36 ,  G06F3/041 ,  G06F3/044

Abstract: The display device includes drive circuits 301 provided in correspondence to the gate lines, respectively, and alternately switches a scanning period for scanning the gate lines and a non-scanning period during one vertical scanning period. The drive circuit 301 includes netA(n), an output switching element M5 connected to netA(n), and a reset circuit R. The output switching element M5 applies a selection voltage to the gate line GLn. The potential of netA(n) changes between a first potential that is equal to or higher than a threshold voltage of the output switching element M5, and a second potential that is lower than the first potential. In the drive circuit 301 wherein a period while netA(n) thereof has the second potential overlaps with the non-scanning period, the reset circuit R resets the potential of netA(n) to the second potential, before the resumption of the scanning period after the non-scanning period.

公开(公告)号：US10235956B2

公开(公告)日：2019-03-19

申请号：US15305798

申请日：2015-04-21

Applicant: Sharp Kabushiki Kaisha

Inventor： Kohhei Tanaka ,  Takayuki Nishiyama ,  Takeshi Noma ,  Ryo Yonebayashi

IPC: G09G3/36 ,  G02F1/133 ,  G02F1/1368 ,  G09G3/20 ,  G02F1/1335 ,  G02F1/1362

Abstract: A technique of, in the case of changing, at predetermined time intervals, a drive circuit for switching a gate line to a selected state, preventing a stopped drive circuit from malfunctioning is provided. Each of a plurality of drive circuits provided for each gate line in an active-matrix substrate includes: a selection circuit unit including an output switching element that is turned on to apply a voltage to the gate line in response to a control signal; an internal line connected to a gate terminal of the output switching element and the gate line; and a potential control circuit unit connected to the internal line for controlling a potential of the internal line in response to the control signal. At predetermined time intervals, a signal supply unit: supplies, to at least one of the plurality of drive circuits, a potential control signal so that the potential of the internal line is controlled to be lower than a threshold voltage of the output switching element by the potential control circuit unit; and supplies, to each of the other drive circuits, a drive signal so that a selection voltage is applied to the gate line by the selection circuit unit.