Abstract:
In a display device that can use a low frequency drive method, in the case of low frequency drive, in a data correction unit (23) of a display control circuit (200), a pixel grayscale value is set such that the differential value between the potential difference between the pixel electrode and the common electrode when a voltage of positive polarity is applied and the potential difference between the pixel electrode and the common electrode when a voltage of negative polarity is applied becomes larger than during normal drive. With this, a correction amount (shift amount) is made larger during low frequency drive than during normal drive, whereby flickers and ghosting during low frequency drive are prevented.
Abstract:
A gate driver (24) which is provided by an IGZO-GDM and a level shifter circuit (13) are connected to each other via a first through a fifth wires (OL1 through OL5). Each wire (OL) is connected to a discharge unit (190). If an electric power supply to a first through a fifth output circuits (OC1 through OC5) in the level shifter circuit (13) becomes lower than a lower operation limit value during a power-off sequence which is supposed to remove a residual charge from inside a panel, outputs from the first through the fifth output circuits (OC1 through OC5) assume a high-impedance state, whereupon a potential on each wire (OL) is drawn by a discharge unit (190) into a ground potential. Therefore, residual charge inside the panel is removed quickly and stably when power supply is shut off.
Abstract:
The present invention is intended to make it unlikely that, in a case where a transistor is turned on in preparation for an operation to turn off a power source of a liquid crystal display device, a DC voltage becomes applied across a pixel even if potential variation (kickback) occurs at a pixel electrode in reaction to a change in status of the transistor from an on state to an off state. A liquid crystal display device of the present invention includes: a data signal line; a scan signal line; a pixel electrode; a transistor connected to (i) the data signal line, (ii) the scan signal line, and (iii) the pixel electrode; and a common electrode, the liquid crystal display device being configured to turn on the transistor during a power-off sequence by causing a change in an electric potential of the scan signal line, the electric potential of the scan signal line increasing up to a first electric potential at a first timing after the change is initiated, and an output electric potential supplied to the data signal line at a second timing which comes after the first timing being set to a value higher than an output electric potential supplied to the common electrode at the second timing.
Abstract:
A liquid crystal display device includes: a data signal line; a scan signal line; a pixel electrode; a transistor connected to (i) the data signal line, (ii) the scan signal line, and (iii) the pixel electrode; and a common electrode, the liquid crystal display device being configured to turn on the transistor during a power-off sequence by causing a change in an electric potential of the scan signal line, the electric potential of the scan signal line reaching a first electric potential at a first timing after the change is initiated, and the common electrode being in an electrically floating state at a second timing which comes after the first timing. This, in a case where the transistor is turned on in preparation for an operation to turn off a power source of the liquid crystal display device, makes it unlikely for a DC voltage to be applied across a pixel even if potential variation (kickback) occurs at the pixel electrode in reaction to a change in status of the transistor from an on state to an off state.
Abstract:
In a display device that can use a low frequency drive method, in the case of low frequency drive, in a data correction unit (23) of a display control circuit (200), a pixel grayscale value is set such that the differential value between the potential difference between the pixel electrode and the common electrode when a voltage of positive polarity is applied and the potential difference between the pixel electrode and the common electrode when a voltage of negative polarity is applied becomes larger than during normal drive. With this, a correction amount (shift amount) is made larger during low frequency drive than during normal drive, whereby flickers and ghosting during low frequency drive are prevented.
Abstract:
The invention provides a gate-in-panel display device capable of preventing deterioration of thin-film transistors during pause drive, as well as a method for driving the same.At the end of a drive period, an active clear signal is provided to thin-film transistors in unit circuits, each thin-film transistor being connected to either a first or second node at a gate terminal, thereby bringing the thin-film transistors into ON state. As a result, the voltages of the first and second nodes are set to a reference voltage. Thus, even if a pause period lasts for a long period of time, the gate terminals of the thin-film transistors are not subjected to sustained voltage application, leading to no threshold voltage shifts.
Abstract:
A gate driver (24) which is provided by an IGZO-GDM and a level shifter circuit (13) are connected to each other via a first through a fifth wires (OL1 through OL5). Each wire (OL) is connected to a discharge unit (190). If an electric power supply to a first through a fifth output circuits (OC1 through OC5) in the level shifter circuit (13) becomes lower than a lower operation limit value during a power-off sequence which is supposed to remove a residual charge from inside a panel, outputs from the first through the fifth output circuits (OC1 through OC5) assume a high-impedance state, whereupon a potential on each wire (OL) is drawn by a discharge unit (190) into a ground potential. Therefore, residual charge inside the panel is removed quickly and stably when power supply is shut off.
Abstract:
A liquid crystal display device includes: a data signal line; a scan signal line; a pixel electrode; a transistor connected to (i) the data signal line, (ii) the scan signal line, and (iii) the pixel electrode; and a common electrode, the liquid crystal display device being configured to turn on the transistor during a power-off sequence by causing a change in an electric potential of the scan signal line, the electric potential of the scan signal line reaching a first electric potential at a first timing after the change is initiated, and the common electrode being in an electrically floating state at a second timing which comes after the first timing. This, in a case where the transistor is turned on in preparation for an operation to turn off a power source of the liquid crystal display device, makes it unlikely for a DC voltage to be applied across a pixel even if potential variation (kickback) occurs at the pixel electrode in reaction to a change in status of the transistor from an on state to an off state.