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    SHIFT REGISTER CIRCUIT, AND DISPLAY DEVICE INCLUDING SAME
    2.
    发明申请
    SHIFT REGISTER CIRCUIT, AND DISPLAY DEVICE INCLUDING SAME 审中-公开

    公开(公告)号：US20180108309A1

    公开(公告)日：2018-04-19

    申请号：US15318043

    申请日：2015-06-09

    Applicant: Sharp Kabushiki Kaisha

    Inventor： Kohhei TANAKA ,  Takeshi NOMA ,  Takayuki NISHIYAMA ,  Ryo YONEBAYASHI ,  Yasuyuki OGAWA ,  Kaoru YAMAMOTO

    IPC: G09G3/36 ,  G11C19/28

    CPC classification number: G09G3/3648 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/28

    Abstract: Each driving circuit in a shift register includes an output unit, a precharge unit, a boosting unit, a gate voltage discharge unit, a gate line discharge unit, and an internal line netA. The output unit includes a TFT(F) that outputs a selection voltage to a gate line. The precharge unit includes a TFT(B) that outputs a control voltage for causing the TFT in the output unit to operate. The boosting unit boosts up a gate voltage of the TFT in the output unit through a capacitor (Cbst). The gate voltage discharge unit includes a TFT(K) that pulls down this gate voltage during a non-selection period while the gate line is not selected. The gate line discharge unit includes a TFT(L) that outputs a non-selection voltage to the gate line during the non-selection period while the gate line is not selected. The internal line is connected to a gate terminal of the TFT in the output unit, the precharge unit, the gate voltage discharge unit, and the boosting unit. A gate terminal of at least one of the TFTs in the precharge unit, the gate voltage discharge unit, and the gate line discharge unit is connected to an internal line in another driving circuit.

    UNIT SHIFT REGISTER CIRCUIT, SHIFT REGISTER CIRCUIT, METHOD FOR CONTROLLING UNIT SHIFT REGISTER CIRCUIT, AND DISPLAY DEVICE
    4.
    发明申请
    UNIT SHIFT REGISTER CIRCUIT, SHIFT REGISTER CIRCUIT, METHOD FOR CONTROLLING UNIT SHIFT REGISTER CIRCUIT, AND DISPLAY DEVICE 审中-公开
    单元移位寄存器电路，移位寄存器电路，用于控制单元移位寄存器电路的方法和显示设备

    公开(公告)号：US20160372068A1

    公开(公告)日：2016-12-22

    申请号：US14901461

    申请日：2014-02-25

    Applicant: SHARP KABUSHIKI KAISHA

    Inventor： Kaoru YAMAMOTO ,  Yasuyuki OGAWA

    IPC: G09G3/36 ,  G11C19/28

    CPC classification number: G09G3/3677 ,  G02F1/134336 ,  G02F1/136286 ,  G02F1/1368 ,  G09G3/20 ,  G09G2310/0251 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2310/08 ,  G11C19/28

    Abstract: A unit shift register circuit constitutes each stage of a shift register circuit. The unit shift register circuit includes an output transistor (T1) configured to input a prescribed clock signal (CK) to a drain terminal, and output an output signal (OUT) from a source terminal. The unit shift register circuit includes a setting transistor (T2) in which a source terminal is connected to a gate electrode of the output transistor (T1), is configured to input an input signal (S) to the drain terminal, and is configured to input to a gate electrode an input signal (VS) in a case of charging a gate electrode (node (VC)) of the output transistor (T1). The input signal (VS) having a voltage higher than that of the input signal (S).

    Abstract translation: 单元移位寄存器电路构成移位寄存器电路的每一级。 单元移位寄存器电路包括被配置为向漏极端子输入规定的时钟信号（CK）的输出晶体管（T1），并从源极端子输出输出信号（OUT）。 单元移位寄存器电路包括其中源极端子连接到输出晶体管（T1）的栅电极的设置晶体管（T2），被配置为向漏极端子输入输入信号（S），并且被配置为 在对输出晶体管（T1）的栅电极（节点（VC））充电的情况下，向栅电极输入输入信号（VS）。 输入信号（VS）的电压高于输入信号（S）的电压。

    SHIFT REGISTER CIRCUIT, DRIVE CIRCUIT, AND DISPLAY DEVICE
    5.
    发明申请
    SHIFT REGISTER CIRCUIT, DRIVE CIRCUIT, AND DISPLAY DEVICE 有权
    移位寄存器电路，驱动电路和显示设备

    公开(公告)号：US20160042806A1

    公开(公告)日：2016-02-11

    申请号：US14774558

    申请日：2014-02-12

    Applicant: SHARP KABUSHIKI KAISHA

    Inventor： Yasuyuki OGAWA ,  Kaoru YAMAMOTO ,  Akihiro ODA ,  Masahiro TOMIDA

    IPC: G11C19/28 ,  G09G3/36

    CPC classification number: G11C19/28 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/043

    Abstract: A shift register circuit has a plurality of unit circuits that are cascade-connected to one another and that output received pulse signals as output signals in accordance with a clock signal, the shift register circuit sequentially outputting the output signals from the plurality of respective unit circuits. The output circuits each include a double-gate transistor having first gate electrode that controls conductivity between the drain electrode and the source electrode, and a second gate electrode formed through an insulating layer and disposed to face the first gate electrode across a semiconductor layer between the drain electrode and the source electrode. The shift register circuit applies a prescribed voltage to the second gate electrode in accordance with a voltage applied to the first gate electrode.

    Abstract translation: 移位寄存器电路具有彼此级联的多个单位电路，并且根据时钟信号输出接收到的脉冲信号作为输出信号，移位寄存器电路顺次地输出来自多个单元电路的输出信号 。 输出电路各自包括双栅极晶体管，其具有控制漏电极和源电极之间的导电性的第一栅电极，以及通过绝缘层形成的第二栅电极，并且设置成跨越第一栅电极跨越半导体层 漏电极和源电极。 移位寄存器电路根据施加到第一栅电极的电压向第二栅电极施加规定的电压。

    DISPLAY DEVICE AND DRIVING METHOD THEREOF
    7.
    发明申请
    DISPLAY DEVICE AND DRIVING METHOD THEREOF 有权
    显示装置及其驱动方法

    公开(公告)号：US20160063955A1

    公开(公告)日：2016-03-03

    申请号：US14783548

    申请日：2014-02-25

    Applicant: SHARP KABUSHIKI KAISHA

    Inventor： Kaoru YAMAMOTO ,  Yasuyuki OGAWA ,  Akihiro ODA ,  Masahiro TOMIDA

    IPC: G09G5/10

    CPC classification number: G09G5/10 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/022 ,  G09G2330/027 ,  H03K3/356026

    Abstract: A display device includes: a display unit, a driver unit, and a control unit. The display unit includes a plurality of pixel units arranged in a matrix. The driver unit includes an output transistor configured to drive a plurality of scanning lines connected to the plurality of pixel units. The control unit is configured to supply to the driver unit in a display period, a signal for displaying an image on the display unit, and control a bias state of the output transistor in a display suspension period, so that an absolute value of a threshold voltage of the output transistor which is increased in the display period decreases.

    Abstract translation: 显示装置包括：显示单元，驱动单元和控制单元。 显示单元包括以矩阵形式布置的多个像素单元。 驱动器单元包括输出晶体管，其被配置为驱动连接到多个像素单元的多条扫描线。 控制单元被配置为在显示周期中向驱动器单元供应用于在显示单元上显示图像的信号，并且在显示暂停时段中控制输出晶体管的偏置状态，使得阈值的绝对值 在显示周期中增加的输出晶体管的电压降低。

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