摘要:
A video signal processing integrated circuit comprising: a test signal generation circuit configured to generate a test signal in conformity with video additional data superimposed on a video signal; a data slicer configured to binarize the test signal through comparison with a slice level, the test signal being supplied from the test signal generation circuit; and a data processing circuit configured to perform data processing of the video additional data binarized by the data slicer.
摘要:
A video signal processing integrated circuit comprising: a test signal generation circuit configured to generate a test signal in conformity with video additional data superimposed on a video signal; a data slicer configured to binarize the test signal through comparison with a slice level, the test signal being supplied from the test signal generation circuit; and a data processing circuit configured to perform data processing of the video additional data binarized by the data slicer.
摘要:
A comparator system for comparing a level of an input signal with a level of a reference signal comprises a first comparator configured to input the input signal to one of input terminals thereof and the reference signal to the other of input terminals thereof, a second comparator configured to input the reference signal to one of input terminals thereof and the input signal to the other of input terminals thereof, and a control circuit configured to input an output of the first comparator and an output of the second comparator. The control circuit selects one of the outputs of the first and second comparators quicker in level change timing, and controls an output signal of the control circuit at the level change timing of the selected output.
摘要:
A data slicer circuit is disclosed which comprises a control circuit to output a digital signal that increases or decreases by a constant value difference depending on the level of an input signal when the input signal is sampled at a given frequency; a conversion circuit to convert the digital signal to an analog signal; and a comparison circuit to compare the video signal with the analog signal, the comparison circuit outputting the result of the comparison as the input signal to the control circuit, wherein the analog signal corresponding to the result of the comparison of the comparison circuit is used as a slice level for separating the data from the video signal.
摘要:
A data slicer circuit is disclosed which comprises a control circuit to output a digital signal that increases or decreases by a constant value difference depending on the level of an input signal when the input signal is sampled at a given frequency; a conversion circuit to convert the digital signal to an analog signal; and a comparison circuit to compare the video signal with the analog signal, the comparison circuit outputting the result of the comparison as the input signal to the control circuit, wherein the analog signal corresponding to the result of the comparison of the comparison circuit is used as a slice level for separating the data from the video signal.
摘要:
A comparator system for comparing a level of an input signal with a level of a reference signal comprises a first comparator configured to input the input signal to one of input terminals thereof and the reference signal to the other of input terminals thereof, a second comparator configured to input the reference signal to one of input terminals thereof and the input signal to the other of input terminals thereof, and a control circuit configured to input an output of the first comparator and an output of the second comparator. The control circuit selects one of the outputs of the first and second comparators quicker in level change timing, and controls an output signal of the control circuit at the level change timing of the selected output.
摘要:
When data are to be written in an EEPROM (1), a CPU (2) sets a flag (12). A voltage booster (13) boosts the power voltage in compliance with the setting of the flag (12). A voltage boost detector (14) detects whether the output of the voltage booster (13) is in voltage boost state. If the output of the voltage booster (13) is not in voltage boost state, a latch (15) is reset and the EEPROM (1) is not permitted to switch to write mode. As a result, it is possible to prevent incorrect data writing in the EEPROM (1) even when the flag (12) has been incorrectly set.
摘要:
A control apparatus connected to the plurality of image processing apparatuses by way of a network judges whether to apply current to a data processing unit held by the image processing apparatus based on a predetermined current application judging rule and transmits a result of judgment to the image processing apparatus. Each image processing apparatus, in the case of receiving the result of judgment of whether to apply current to the data processing unit through a NIC from the control apparatus, controls a current application state of the data processing unit based on the result of judgment. The data processing unit is divided in a plurality of functional blocks, and the current application to the data processing unit is controlled, functional block by functional block.
摘要:
The paper carrying apparatus includes a first paper carrying mechanism (first carrying mechanism), a second paper carrying mechanism (second carrying mechanism) provided on the downstream of the first carrying mechanism in a carrying direction, an electric motor that drives the first carrying mechanism, a stepping motor that drives the second carrying mechanism, and an acceleration sensor that is a vibration detecting mechanism detecting vibration generated in the rotation shaft of the stepping motor. When the first carrying mechanism and the second carrying mechanism concurrently carry the same paper sheet, the electric motor is controlled in driving velocity based on information of vibration detected by the acceleration sensor at the timing of the rear end of the carried paper sheet passing the first paper carrying mechanism.
摘要:
Image processing apparatus, appropriate administration of the depletion load of the apparatus and confidential data can be facilitated without victimizing the convenience by combining use restriction of the job processing functions and causing another image processing apparatus as a substitute to execute the job processing without victimizing the convenience. The main controlling unit judges whether the use of each of the job processing functions in the apparatus that includes this main controlling unit is permitted or prohibited for a user (S303) and controls according to the judgment result. The main controlling unit further judges whether another image processing apparatus permits, as a substitute, the execution of the job processing of a portion of a setting job for which the execution is prohibited (S309) and causes another image processing apparatus that has judged to permit the execution of the processing as a substitute to execute the job processing.