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公开(公告)号：US20100279496A1
公开(公告)日：2010-11-04
申请号：US12755058
申请日：2010-04-06
IPC分类号： H01L21/8238
CPC分类号： H01L21/823857
摘要： To improve productivity and performance of a CMISFET including a high-dielectric-constant gate insulating film and a metal gate electrode. An Hf-containing insulating film for a gate insulating film is formed over the main surface of a semiconductor substrate. A metal nitride film is formed on the insulating film. The metal nitride film in an nMIS formation region where an n-channel MISFET is to be formed is selectively removed by wet etching using a photoresist pattern on the metal nitride films a mask. Then, a threshold adjustment film containing a rare-earth element is formed. The Hf-containing insulating film in the nMIS formation region reacts with the threshold adjustment film by heat treatment. The Hf-containing insulating film in a pMIS formation region where a p-channel MISFET is to be formed does not react with the threshold adjustment film because of the existence of the metal nitride film. Then, after removing the unreacted threshold adjustment film and the metal nitride film, metal gate electrodes are formed in the nMIS formation region and the pMIS formation region.
摘要翻译： 提高包括高介电常数栅极绝缘膜和金属栅电极在内的CMISFET的生产率和性能。 在半导体衬底的主表面上形成用于栅极绝缘膜的含Hf绝缘膜。 在绝缘膜上形成金属氮化物膜。 通过在金属氮化物膜上使用光刻胶图案的掩模，通过湿式蚀刻选择性地去除要形成n沟道MISFET的nMIS形成区域中的金属氮化物膜。 然后，形成含有稀土元素的阈值调节膜。 nMIS形成区域中的含Hf绝缘膜通过热处理与阈值调节膜反应。 由于存在金属氮化物膜，所以要形成p沟道MISFET的pMIS形成区域中的含Hf绝缘膜不会与阈值调节膜反应。 然后，在除去未反应的阈值调整膜和金属氮化物膜之后，在nMIS形成区域和pMIS形成区域中形成金属栅电极。
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公开(公告)号：US08120118B2
公开(公告)日：2012-02-21
申请号：US12943600
申请日：2010-11-10
IPC分类号： H01L21/70
CPC分类号： H01L21/823842
摘要： Provided is a highly reliable semiconductor device equipped with a plurality of semiconductor elements having desired properties, respectively; and a manufacturing method facilitating the manufacture of the semiconductor device. The semiconductor device is manufactured by forming a gate-electrode metal film having a thickness of from 3 to 30 nm over the entire upper surface of a gate insulating film; forming an n-side cap layer having a thickness of 10 nm or less over the entire upper surface of a portion of the gate-electrode metal film belonging to an nFET region by using a material different from that of the gate-electrode metal film; and carrying out heat treatment over the n-side cap layer to diffuse the material of the n-side cap layer into the gate-electrode metal film immediately below the n-side cap layer and react them to form an n-side gate-electrode metal film in a nFET region. A poly-Si layer is then deposited, followed by gate electrode processing.
摘要翻译： 提供一种高度可靠的半导体器件，其分别配备有具有期望特性的多个半导体元件; 以及便于制造半导体器件的制造方法。 半导体器件通过在栅极绝缘膜的整个上表面上形成厚度为3至30nm的栅电极金属膜来制造; 通过使用与栅电极金属膜不同的材料，在属于nFET区域的栅极金属膜的一部分的整个上表面上形成厚度为10nm以下的n侧覆盖层; 在n侧盖层上进行热处理，将n侧盖层的材料向n侧盖层正下方的栅电极金属膜扩散，形成n侧栅电极 金属膜在nFET区域。 然后沉积多晶硅层，随后进行栅电极处理。
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公开(公告)号：US08293632B2
公开(公告)日：2012-10-23
申请号：US12755058
申请日：2010-04-06
IPC分类号： H01L21/3205
CPC分类号： H01L21/823857
摘要： To improve productivity and performance of a CMISFET including a high-dielectric-constant gate insulating film and a metal gate electrode. An Hf-containing insulating film for a gate insulating film is formed over the main surface of a semiconductor substrate. A metal nitride film is formed on the insulating film. The metal nitride film in an nMIS formation region where an n-channel MISFET is to be formed is selectively removed by wet etching using a photoresist pattern on the metal nitride films a mask. Then, a threshold adjustment film containing a rare-earth element is formed. The Hf-containing insulating film in the nMIS formation region reacts with the threshold adjustment film by heat treatment. The Hf-containing insulating film in a pMIS formation region where a p-channel MISFET is to be formed does not react with the threshold adjustment film because of the existence of the metal nitride film. Then, after removing the unreacted threshold adjustment film and the metal nitride film, metal gate electrodes are formed in the nMIS formation region and the pMIS formation region.
摘要翻译： 提高包括高介电常数栅极绝缘膜和金属栅电极在内的CMISFET的生产率和性能。 在半导体衬底的主表面上形成用于栅极绝缘膜的含Hf绝缘膜。 在绝缘膜上形成金属氮化物膜。 通过在金属氮化物膜上使用光刻胶图案的掩模，通过湿式蚀刻选择性地去除要形成n沟道MISFET的nMIS形成区域中的金属氮化物膜。 然后，形成含有稀土元素的阈值调节膜。 nMIS形成区域中的含Hf绝缘膜通过热处理与阈值调节膜反应。 由于存在金属氮化物膜，所以要形成p沟道MISFET的pMIS形成区域中的含Hf绝缘膜不会与阈值调节膜反应。 然后，在除去未反应的阈值调整膜和金属氮化物膜之后，在nMIS形成区域和pMIS形成区域中形成金属栅电极。
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公开(公告)号：US20110057265A1
公开(公告)日：2011-03-10
申请号：US12943600
申请日：2010-11-10
IPC分类号： H01L27/092
CPC分类号： H01L21/823842
摘要： Provided is a highly reliable semiconductor device equipped with a plurality of semiconductor elements having desired properties, respectively; and a manufacturing method facilitating the manufacture of the semiconductor device. The semiconductor device is manufactured by forming a gate-electrode metal film having a thickness of from 3 to 30 nm over the entire upper surface of a gate insulating film; forming an n-side cap layer having a thickness of 10 nm or less over the entire upper surface of a portion of the gate-electrode metal film belonging to an nFET region by using a material different from that of the gate-electrode metal film; and carrying out heat treatment over the n-side cap layer to diffuse the material of the n-side cap layer into the gate-electrode metal film immediately below the n-side cap layer and react them to form an n-side gate-electrode metal film in a nFET region. A poly-Si layer is then deposited, followed by gate electrode processing.
摘要翻译： 提供一种高度可靠的半导体器件，其分别配备有具有期望特性的多个半导体元件; 以及便于制造半导体器件的制造方法。 半导体器件通过在栅极绝缘膜的整个上表面上形成厚度为3至30nm的栅电极金属膜来制造; 通过使用与栅电极金属膜不同的材料，在属于nFET区域的栅极金属膜的一部分的整个上表面上形成厚度为10nm以下的n侧覆盖层; 在n侧盖层上进行热处理，将n侧盖层的材料向n侧盖层正下方的栅电极金属膜扩散，形成n侧栅电极 金属膜在nFET区域。 然后沉积多晶硅层，随后进行栅电极处理。
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公开(公告)号：US07855134B2
公开(公告)日：2010-12-21
申请号：US12354434
申请日：2009-01-15
IPC分类号： H01L21/3205 , H01L21/4763
CPC分类号： H01L21/823842
摘要： Provided is a highly reliable semiconductor device equipped with a plurality of semiconductor elements having desired properties, respectively; and a manufacturing method facilitating the manufacture of the semiconductor device. The semiconductor device is manufactured by forming a gate-electrode metal film having a thickness of from 3 to 30 nm over the entire upper surface of a gate insulating film; forming an n-side cap layer having a thickness of 10 nm or less over the entire upper surface of a portion of the gate-electrode metal film belonging to an nFET region by using a material different from that of the gate-electrode metal film; and carrying out heat treatment over the n-side cap layer to diffuse the material of the n-side cap layer into the gate-electrode metal film immediately below the n-side cap layer and react them to form an n-side gate-electrode metal film in a nFET region. A poly-Si layer is then deposited, followed by gate electrode processing.
摘要翻译： 提供一种高度可靠的半导体器件，其分别配备有具有期望特性的多个半导体元件; 以及便于制造半导体器件的制造方法。 半导体器件通过在栅极绝缘膜的整个上表面上形成厚度为3至30nm的栅电极金属膜来制造; 通过使用与栅电极金属膜不同的材料，在属于nFET区域的栅极金属膜的一部分的整个上表面上形成厚度为10nm以下的n侧覆盖层; 在n侧盖层上进行热处理，将n侧盖层的材料向n侧盖层正下方的栅电极金属膜扩散，形成n侧栅电极 金属膜在nFET区域。 然后沉积多晶硅层，随后进行栅电极处理。
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公开(公告)号：US20090218634A1
公开(公告)日：2009-09-03
申请号：US12354434
申请日：2009-01-15
IPC分类号： H01L27/092 , H01L21/3205
CPC分类号： H01L21/823842
摘要： Provided is a highly reliable semiconductor device equipped with a plurality of semiconductor elements having desired properties, respectively; and a manufacturing method facilitating the manufacture of the semiconductor device. The semiconductor device is manufactured by forming a gate-electrode metal film having a thickness of from 3 to 30 nm over the entire upper surface of a gate insulating film; forming an n-side cap layer having a thickness of 10 nm or less over the entire upper surface of a portion of the gate-electrode metal film belonging to an nFET region by using a material different from that of the gate-electrode metal film; and carrying out heat treatment over the n-side cap layer to diffuse the material of the n-side cap layer into the gate-electrode metal film immediately below the n-side cap layer and react them to form an n-side gate-electrode metal film in a nFET region. A poly-Si layer is then deposited, followed by gate electrode processing.
摘要翻译： 提供一种高度可靠的半导体器件，其分别配备有具有期望特性的多个半导体元件; 以及便于制造半导体器件的制造方法。 半导体器件通过在栅极绝缘膜的整个上表面上形成厚度为3至30nm的栅电极金属膜来制造; 通过使用与栅电极金属膜不同的材料，在属于nFET区域的栅极金属膜的一部分的整个上表面上形成厚度为10nm以下的n侧覆盖层; 在n侧盖层上进行热处理，将n侧盖层的材料向n侧盖层正下方的栅电极金属膜扩散，形成n侧栅电极 金属膜在nFET区域。 然后沉积多晶硅层，随后进行栅电极处理。
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公开(公告)号：US20100320542A1
公开(公告)日：2010-12-23
申请号：US12782457
申请日：2010-05-18
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823857 , H01L27/092
摘要： To improve the performance of a CMISFET having a high-k gate insulating film and a metal gate electrode. An n-channel MISFET has, over the surface of a p-type well of a semiconductor substrate, a gate electrode formed via a first Hf-containing insulating film serving as a gate insulating film, while a p-channel MISFET has, over the surface of an n-type well, another gate electrode formed via a second Hf-containing insulating film serving as a gate insulating film. These gate electrodes have a stack structure of a metal film and a silicon film thereover. The first Hf-containing insulating film is an insulating material film comprised of Hf, a rare earth element, Si, O, and N or comprised of Hf, a rare earth element, Si, and O, while the second Hf-containing insulating film is an insulating material film comprised of Hf, Al, O, and N or comprised of Hf, Al, and O.
摘要翻译： 为了提高具有高k栅极绝缘膜和金属栅电极的CMISFET的性能。 n沟道MISFET在半导体衬底的p型阱的表面上具有通过用作栅极绝缘膜的第一Hf绝缘膜形成的栅电极，而p沟道MISFET具有 n型阱的表面，通过用作栅极绝缘膜的第二Hf含量绝缘膜形成的另一个栅电极。 这些栅电极具有金属膜和其上的硅膜的堆叠结构。 第一含Hf绝缘膜是包括Hf，稀土元素，Si，O和N或由Hf，稀土元素，Si和O构成的绝缘材料膜，而第二Hf含量绝缘膜 是由Hf，Al，O和N组成或由Hf，Al和O构成的绝缘材料膜。
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公开(公告)号：US20110284971A1
公开(公告)日：2011-11-24
申请号：US13109736
申请日：2011-05-17
IPC分类号： H01L27/092 , H01L21/28
CPC分类号： H01L21/823857 , H01L21/28088 , H01L27/092 , H01L29/513 , H01L29/518 , H01L29/66492
摘要： There are provided a semiconductor device in which the threshold voltage of a p-channel field effect transistor is reliably controlled to allow a desired characteristic to be obtained, and a manufacturing method thereof. As a heat treatment performed at a temperature of about 700 to 900° C. proceeds, in an element formation region, aluminum (Al) in an aluminum (Al) film is diffused into a hafnium oxynitride (HfON) film, and thereby added as an element to the hafnium oxynitride (HfON) film. In addition, aluminum (Al) and titanium (Ti) in a hard mask formed of a titanium aluminum nitride (TiAlN) film are diffused into the hafnium oxynitride (HfON) film, and thereby added as elements to the hafnium oxynitride (HfON) film.
摘要翻译： 提供一种可以可靠地控制p沟道场效应晶体管的阈值电压以获得期望特性的半导体器件及其制造方法。 当在700〜900℃左右的温度下进行热处理时，在元素形成区域中，将铝（Al）膜中的铝（Al）扩散到氮氧化铪（HfON）膜中， 铪氧氮化铪（HfON）膜的元素。 另外，由氮化钛（TiAlN）膜形成的硬掩模中的铝（Al）和钛（Ti）扩散到氮氧化铪（HfON）膜中，从而作为元素添加到氮氧化铪（HfON）膜 。
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公开(公告)号：US07268047B2
公开(公告)日：2007-09-11
申请号：US11357072
申请日：2006-02-21
IPC分类号： H01L21/336
CPC分类号： H01L21/28185 , H01L21/28194 , H01L29/513 , H01L29/517 , H01L29/7833
摘要： A gate insulating film on a silicon substrate of includes a SiO2 film and a high-k film. The high-k film contains a transition metal, aluminum, silicon, and oxygen. The concentration of silicon in the high-k film is higher than the concentrations of the transition metal and aluminum in the vicinity of the interface with the SiO2 film and the vicinity of the interface with the gate electrode. Furthermore, it is preferable that the concentration of silicon is the highest at least in one of the vicinity of the interface with the SiO2 film or the vicinity of the interface with the gate electrode, gradually decreases with distance from these interfaces, and becomes the lowest in a central part of the high-k film.
摘要翻译： 硅衬底上的栅极绝缘膜包括SiO 2膜和高k膜。 高k膜含有过渡金属，铝，硅和氧。 高k膜中的硅的浓度高于与SiO 2膜的界面附近的过渡金属和铝的浓度以及与栅电极的界面附近的浓度。 此外，优选至少在与SiO 2膜的界面附近或与栅电极的界面附近的硅中的浓度最高，随着距离逐渐减小 从这些界面，并成为高k电影中心部分中最低的。
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公开(公告)号：US20060138572A1
公开(公告)日：2006-06-29
申请号：US11357072
申请日：2006-02-21
IPC分类号： H01L21/8238
CPC分类号： H01L21/28185 , H01L21/28194 , H01L29/513 , H01L29/517 , H01L29/7833
摘要： A gate insulating film on a silicon substrate of includes a SiO2 film and a high-k film. The high-k film contains a transition metal, aluminum, silicon, and oxygen. The concentration of silicon in the high-k film is higher than the concentrations of the transition metal and aluminum in the vicinity of the interface with the SiO2 film and the vicinity of the interface with the gate electrode. Furthermore, it is preferable that the concentration of silicon is the highest at least in one of the vicinity of the interface with the SiO2 film or the vicinity of the interface with the gate electrode, gradually decreases with distance from these interfaces, and becomes the lowest in a central part of the high-k film.
摘要翻译： 硅衬底上的栅极绝缘膜包括SiO 2膜和高k膜。 高k膜含有过渡金属，铝，硅和氧。 高k膜中的硅的浓度高于与SiO 2膜的界面附近的过渡金属和铝的浓度以及与栅电极的界面附近的浓度。 此外，优选至少在与SiO 2膜的界面附近或与栅电极的界面附近的硅中的浓度最高，随着距离逐渐减小 从这些界面，并成为高k电影中心部分中最低的。
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