Symmetrical differential amplifier circuit
    1.
    发明授权
    Symmetrical differential amplifier circuit 失效
    对称差分放大器电路

    公开(公告)号:US5248946A

    公开(公告)日:1993-09-28

    申请号:US805144

    申请日:1991-12-11

    CPC分类号: H03F3/45076

    摘要: An amplifier circuit of a symmetrical type is implemented with load transistors 1, 3, 5, 6 and input transistors 2, 4. Load transistors 1, 5 and input transistor 2 constitute a first inverter, and load transistors 3, 6 and input transistor 4 constitute a second inverter. A change in the output potential of each inverter is transmitted to a load transistor of the other inverter and increases the fluctuation of the potential of an output signal. A transistor 9 or 10 for current control is arranged between an input transistor and ground or between a load transistor and a power supply. The transistor 9 or 10 for current control interrupts through current when operation of the amplifier circuit is unnecessary and enhances the gain when the amplifier circuit is on operation. The gain is enhanced by setting the conductance of the load transistor and the conductance of the input transistor on predetermined conditions. Furthermore, an offset voltage caused in each amplifier circuit is canceled out by connecting two sets of symmetrical-type amplifier circuits.

    Semiconductor integrated circuit with circuits for generating stable
reference potential
    2.
    发明授权
    Semiconductor integrated circuit with circuits for generating stable reference potential 失效
    具有生成稳定参考电位的电路的半导体集成电路

    公开(公告)号:US5223744A

    公开(公告)日:1993-06-29

    申请号:US680185

    申请日:1991-04-03

    CPC分类号: H03K19/086 G05F3/227

    摘要: A semiconductor integrated circuit includes a plurality of emitter-coupled logic (ECL) circuits (10) and circuitry (5, 6a, 6b) generating a reference potential to determine the logic threshold value of the ECL circuits. The reference potential generating circuitry is provided near a first pad (2) for a first supply voltage (VCC) and includes a circuit (5) for generating a first reference potential from the first supply voltage, and a circuit (6a, 6b) provided one for each the group of ECL circuits and provided near an associated ECL circuit group for generating a second reference potential from the first reference potential to generate a reference potential as the logic threshold potential of a corresponding ECL circuit. The semiconductor integrated circuit further includes a first clamping potential generating circuit (16) provided near the first pad for generating a first clamping potential in response to the first supply voltage, and a first clamping circuit (113) for clamping the potential at a node of current/voltage converting resistance element (205, 206) included in the ECL circuits at a first voltage in response to the first clamping potential.

    摘要翻译: 半导体集成电路包括多个发射极耦合逻辑(ECL)电路(10)和产生用于确定ECL电路的逻辑阈值的参考电位的电路(5,6a,6b)。 参考电位产生电路设置在用于第一电源电压(VCC)的第一焊盘(2)附近,并且包括用于从第一电源电压产生第一参考电位的电路(5)和提供的电路(6a,6b) 在每个ECL电路组中一个,并且在相关联的ECL电路组附近提供用于从第一参考电位产生第二参考电位,以产生参考电位作为相应的ECL电路的逻辑阈值电位。 半导体集成电路还包括:第一钳位电位产生电路(16),设置在第一焊盘附近,用于响应于第一电源电压产生第一钳位电位;以及第一钳位电路(113),用于将电位钳位在 电流/电压转换电阻元件(205,206)响应于第一钳位电位而以第一电压包含在ECL电路中。

    Input buffer circuit
    3.
    发明授权
    Input buffer circuit 失效
    输入缓冲电路

    公开(公告)号:US5043603A

    公开(公告)日:1991-08-27

    申请号:US462056

    申请日:1990-01-08

    IPC分类号: H03K19/003 H03K19/086

    CPC分类号: H03K19/086 H03K19/00376

    摘要: When an input terminal, which is connected to an input transistor, is opened, a transistor having an emitter connected to the input transistor conducts to supply constant current to a constant current source which is connected to the emitter of the input transistor. Therefore, load current of a reference circuit connected to the constant current source is not changed even if the input terminal is opened. As the result, current valves of all constant current sources receiving voltage from the reference circuit are not changed so that the internal circuit of a semiconductor integrated circuit device can be stably operated.

    Input buffer circuit
    4.
    发明授权
    Input buffer circuit 失效
    输入缓冲电路

    公开(公告)号:US4910425A

    公开(公告)日:1990-03-20

    申请号:US236725

    申请日:1988-08-26

    IPC分类号: H03K19/003 H03K19/086

    CPC分类号: H03K19/086 H03K19/00376

    摘要: When an input terminal, which is connected to an input transistor, is opened, a transistor having an emitter connected to the input transistor conducts to supply constant current to a constant current source which is connected to the emitter of the input transistor. Therefore, load current of a reference circuit connected to the constant current source is not changed even if the input terminal is opened. As the result, current values of all constant current sources receiving voltage from the reference circuit are not changed so that the internal circuit of a semiconductor integrated circuit device can be stably operated.

    摘要翻译: 当连接到输入晶体管的输入端被打开时,具有连接到输入晶体管的发射极的晶体管导通,以向连接到输入晶体管的发射极的恒定电流源提供恒定电流。 因此,连接到恒流源的参考电路的负载电流即使输入端子打开也不会改变。 结果,从参考电路接收电压的所有恒定电流源的电流值不改变,从而可以稳定地操作半导体集成电路器件的内部电路。

    STRUCTURE FOR FUEL FILLER TUBE OPENING
    5.
    发明申请
    STRUCTURE FOR FUEL FILLER TUBE OPENING 审中-公开
    燃料填充管开放结构

    公开(公告)号:US20130206757A1

    公开(公告)日:2013-08-15

    申请号:US13878660

    申请日:2011-09-22

    IPC分类号: B60K15/04

    摘要: A structure for a fuel filler tube opening comprises: a fuel adapter (17) having a filler tube opening (15); a fuel lid (16) for closing an opening (13) formed in a vehicle body (27); and a protective cover (32) provided on an inner surface (31) of the fuel lid (16). The protective cover (32) is separated by the distance (d) from an insertion opening (24) of the filler tube opening (15) and surrounds the insertion opening (24).

    摘要翻译: 一种用于燃料加注管开口的结构,包括:具有加注管开口(15)的燃料适配器(17); 用于关闭形成在车体(27)中的开口(13)的燃料盖(16); 以及设置在燃料盖(16)的内表面(31)上的保护罩(32)。 保护罩(32)与填充管开口(15)的插入开口(24)间隔开距离(d)并且包围插入开口(24)。

    Nonvolatile semiconductor memory device and method of erasing data of nonvolatile semiconductor memory device
    7.
    发明授权
    Nonvolatile semiconductor memory device and method of erasing data of nonvolatile semiconductor memory device 有权
    非易失性半导体存储器件和擦除非易失性半导体存储器件的数据的方法

    公开(公告)号:US06567316B1

    公开(公告)日:2003-05-20

    申请号:US09985013

    申请日:2001-11-01

    IPC分类号: G11C1600

    CPC分类号: G11C16/3409 G11C16/3404

    摘要: Operations of applying an erase pulse and further performing block program before erasure are executed in steps S2 and S3 before applying the erase pulse on a block by block basis. This narrows the distribution width of the threshold voltage, and reduces the number of the memory transistors to be subjected to over-erase verify so that a total erasing time of data of a flash memory can be reduced.

    摘要翻译: 在擦除脉冲之前在步骤S2和S3中执行擦除脉冲之前的施加擦除脉冲和进一步执行块程序的操作,然后逐块地应用擦除脉冲。 这会使阈值电压的分布宽度变窄,并且减少要进行过擦除验证的存储晶体管的数量,从而可以减少闪速存储器的数据的总擦除时间。

    Cosmetic container and cartridge for cosmetic container
    8.
    发明授权
    Cosmetic container and cartridge for cosmetic container 失效
    用于化妆品容器的化妆品容器和药筒

    公开(公告)号:US06334729B1

    公开(公告)日:2002-01-01

    申请号:US09701010

    申请日:2000-11-22

    申请人: Atsushi Ohba

    发明人: Atsushi Ohba

    IPC分类号: A45D4004

    摘要: At least a part of a cylindrical body (20) is rotatably and unslidably housed in a front cylinder (10). A beam (30) for retaining a stick type cosmetic material (4) on the upper end side is made unrotatable and slidable to the front cylinder (10) by a sliding mechanism and made feedable by a rotation together with the cylindrical body (20) by a feeding mechanism. The beam (30) is always urged downward by a return spring (6). It is arranged such that a lower end part of the cylindrical body (20) is at the same level as that of a lower end part of the front cylinder (10) and a synchronous engagement section (26) formed on an inner circumferential surface of a lower end part of the cylindrical body (20) is synchronously engaged with a synchronous engagement shaft 43 provided at a bottom (42) of a container body (2). An O-ring (5) is installed between the front cylinder (10) and the container body (2).

    摘要翻译: 圆柱体(20)的至少一部分可旋转和不可靠地容纳在前汽缸(10)中。 用于在上端侧保持棒状化妆料(4)的梁(30)通过滑动机构使其不能旋转并滑动到前缸(10),并与圆筒体(20)一起旋转地进给, 通过送料机构。 梁(30)总是被复位弹簧(6)向下推动。 其特征在于,所述圆筒体(20)的下端部与所述前筒(10)的下端部的下端部相同,所述同步接合部(26)形成在所述前筒 圆柱体(20)的下端部与设置在容器主体(2)的底部(42)的同步接合轴43同步地接合。 O形环(5)安装在前汽缸(10)和容器主体(2)之间。

    Liquid cosmetic container
    9.
    发明授权
    Liquid cosmetic container 失效
    液体化妆品容器

    公开(公告)号:US06270273B1

    公开(公告)日:2001-08-07

    申请号:US09581425

    申请日:2000-06-13

    申请人: Atsushi Ohba

    发明人: Atsushi Ohba

    IPC分类号: A46B1100

    CPC分类号: A45D34/047

    摘要: A liquid cosmetic container which has a secure mechanism for defining the limit of the aperture regulation of a remover 13 is provided. In addition, the degree of aperture of the remover 13 is not influenced by the operation of putting or removing a cap 3. The liquid cosmetic container is provided with the cap 3, and an aperture-regulating ring 7 engages with an upper outer face of a container main body 19. A neck 5 which has an aperture regulating section 11 on the rear end moves in an axial direction in response to rotations of the aperture-regulating ring 7, thereby varying the diameter of a central aperture 119 of the remover 13. Furthermore a rotation-limiting piece 103 extends from a lower end of the aperture-regulating ring 7 and a rotation-limiting projection 136 is provided on an outer face of the container main body 19 which is under an engaging surface of the aperture-regulating ring 7. The rotation of the aperture-regulating ring 7 is regulated by the contact of the rotation-limiting piece 103 with the rotation-limiting projection 136.

    摘要翻译: 提供了一种液体化妆品容器,其具有用于限定去除器13的孔径调节限制的固定机构。 此外,除去器13的孔径的程度不受放置或取下盖子3的操作的影响。液体化妆品容器设置有盖3,孔径调节环7与 容器主体19.在后端具有孔限制部11的颈部5响应于孔径调节环7的旋转而沿轴向移动,从而改变去除器13的中心孔119的直径 此外,限位片103从孔径调节环7的下端延伸,并且在容器主体19的外表面上设置有旋转限制突起136,该容器主体19位于开口调节环7的接合表面下方 孔限制环7的旋转通过旋转限制片103与旋转限制突起136的接触来调节。

    Semiconductor memory device and method for reading and writing data
therein
    10.
    再颁专利
    Semiconductor memory device and method for reading and writing data therein 失效
    半导体存储器件及其中的数据读写方法

    公开(公告)号:USRE36655E

    公开(公告)日:2000-04-11

    申请号:US917220

    申请日:1997-08-25

    CPC分类号: G11C7/1051

    摘要: An NAND gate for outputting an output establishment detection signal in response to the fact that a complementary output of a latch type sense amplifier has been established is provided. When a tristate buffer is activated by signal, a word line which has been in a selected state is rendered non-selected state. Accordingly, current can be prevented from leaking from a power supply line to a ground line in tristate buffer. In addition, column current Ic flowing through memory cells can be minimized in response to the fact that word line has been set to a selected state.

    摘要翻译: 提供了一种用于响应于已经建立了锁存型读出放大器的互补输出的事实来输出输出建立检测信号的NAND门。 当通过信号激活三态缓冲器时,已经处于选择状态的字线被呈现为非选择状态。 因此,可以防止电流从三电平缓冲器中的电源线泄漏到接地线。 此外,响应于字线被设置为选择状态的事实,流过存储器单元的列电流Ic可以最小化。