公开(公告)号：US12101658B2

公开(公告)日：2024-09-24

申请号：US16945870

申请日：2020-08-02

申请人： Silicon Laboratories Inc.

发明人： Subba Reddy Kallam ,  Partha Murali ,  Venkat Mattela ,  Venkata Siva Prasad Pulagam

IPC分类号： H04W28/02 ,  G06F9/30 ,  G06F9/38 ,  H04W4/80 ,  H04W16/18 ,  H04W72/54 ,  H04W72/563 ,  H04W84/12

CPC分类号： H04W28/0231 ,  G06F9/30098 ,  G06F9/3836 ,  H04W4/80 ,  H04W16/18 ,  H04W72/54 ,  H04W72/563 ,  H04W84/12

摘要： A multi-thread communication system has several communications processors operative over a single interface for transmitting and receiving packets. The multi-thread communications processor is operative to sequentially handle multiple thread processes for each communications processor on a cycle by cycle basis according to a thread map register which determines the order of execution and how many cycles of a particular thread occur during a canonical interval.