APPARATUS AND METHOD FOR DETECTING ERRORS DURING DATA ENCRYPTION

    公开(公告)号:US20230198754A1

    公开(公告)日:2023-06-22

    申请号:US18076615

    申请日:2022-12-07

    CPC classification number: H04L9/0891 H04L9/0631 H04L9/0861

    Abstract: The invention introduces an apparatus for detecting errors during data encryption. The apparatus includes a key generation circuitry and a key-error detection circuitry. The key generation circuitry is arranged operably to realize a key expansion operation for generating multiple round keys based on a root key in an encryption algorithm, where the encryption algorithm encodes plaintext or an intermediate encryption result with one round key in a corresponding round. The error detection circuitry is arranged operably to: calculate redundant data corresponding to each round key; and output an error signal to a processing unit when finding that any round key does not match corresponding redundant data at a check point during the key expansion operation.

    APPARATUS AND METHOD FOR DETECTING ERRORS DURING DATA ENCRYPTION

    公开(公告)号:US20230198755A1

    公开(公告)日:2023-06-22

    申请号:US18076899

    申请日:2022-12-07

    CPC classification number: H04L9/0891 H04L9/0631

    Abstract: The invention introduces an apparatus for detecting errors during data encryption. The apparatus includes an encoding circuitry and an error detection circuitry. The encoding circuitry is arranged operably to realize an encryption algorithm including multiple rounds, in which of each round encodes plaintext or an intermediate encryption result with a round key. The error detection circuitry is arranged operably to: calculate redundant data corresponding to the intermediate encryption result; and output an error signal to a processing unit when finding that the intermediate encryption result does not match the redundant data at a check point during an encryption process.

    APPARATUS AND METHOD FOR EXPANDING ROUND KEYS DURING DATA ENCRYPTION

    公开(公告)号:US20240322828A1

    公开(公告)日:2024-09-26

    申请号:US18143313

    申请日:2023-05-04

    CPC classification number: H03K19/17768 H03K19/1737 H03K19/17728 H03K19/21

    Abstract: The invention introduces an apparatus and a method for expanding round keys during data encryption. The method includes: configuring a word-processing circuitry to operate in a first mode to calculate a first intermediate calculation result corresponding to an even-number round key according to a last double word of a 0th double word to a 7th double word in each even-number clock cycle starting from a 2nd clock cycle; and configuring the word-processing circuitry to operate in a second mode to calculate a second intermediate calculation result corresponding to an odd-number round key according to the last double word of the 0th double word to the 7th double word in each odd-number clock cycle starting from a 3rd clock cycle. In the first mode, a first data path is formed in the word-processing circuitry, which includes a word split circuitry, a rotate-word circuitry, a substitute-word circuitry, a round-constant circuitry and a word concatenation circuitry. In the second mode, a second data path is formed in the word-processing circuitry, which includes the word split circuitry, the substitute-word circuitry and the word concatenation circuitry.

    APPARATUS AND METHOD FOR DETECTING ERRORS DURING DATA ENCRYPTION

    公开(公告)号:US20240143791A1

    公开(公告)日:2024-05-02

    申请号:US18203305

    申请日:2023-05-30

    CPC classification number: G06F21/602 H03M13/1575

    Abstract: The invention introduces an apparatus for detecting errors during data encryption. The apparatus includes a search circuitry and a substitution check circuitry. The key generation circuitry is arranged operably to convert a first value of one byte corresponding to a plaintext, an intermediate encryption result, or a round key into a second value of a K-bit according to an 8-to-K lookup table, where K is an integer ranging from 10 to 15 and the second value comprises (K minus 8) bits of a Hamming parity. The substitution check circuitry is arranged operably to employ check formulae corresponding to the 8-to-K lookup table to determine whether an error is occurred during a conversion of the first value of the one byte into the second value of the K-bit, and output an error signal when finding the error, where a total amount of the formulae is K minus 8.

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