公开(公告)号：US20200042029A1

公开(公告)日：2020-02-06

申请号：US16600123

申请日：2019-10-11

Applicant: SOCIONEXT INC.

Inventor： Kyota SHIMIZU ,  Toshiya SUZUKI ,  Tomohiko KOTO

IPC: G05F1/618 ,  H03K19/00 ,  H03K19/0175 ,  H03K3/356 ,  H03K19/003 ,  G11C7/10 ,  H03K3/281

Abstract: An output circuit includes: a first p-type transistor having a source connected to VDDH and a gate to which an input signal is fed; and a second p-type transistor having a source connected to the drain of the first p-type transistor, a drain connected to an output terminal, and a gate connected to a first node. A capacitor has one terminal to which the input signal is fed and the other terminal connected to the first node. A first n-type transistor has a source connected to VDDL, a drain connected to the first node, and a gate to which a signal corresponding to the input signal is fed. A second n-type transistor has a source and a gate both connected to VDDL and a drain connected to the first node.

公开(公告)号：US20240250676A1

公开(公告)日：2024-07-25

申请号：US18627023

申请日：2024-04-04

Applicant: Socionext Inc.

Inventor： Kyota SHIMIZU ,  Tomohiko KOTO ,  Masahisa IIDA

IPC: H03K17/041 ,  H03K19/0185

CPC classification number: H03K17/04106 ,  H03K19/018507

Abstract: An output circuit outputs an output signal having an amplitude VCCH responsive to an input signal having an amplitude VCCL. The output circuit includes: first and second p-type transistors connected in series between VCCH and an output terminal; a first n-type transistor grounded at its source and receiving a first signal at its gate; a third p-type transistor connected to VCCH at its source, connected to the gate of the first p-type transistor at its drain, and receiving a second signal at its gate; and a first diode connected between the drains of the first n-type transistor and the third p-type transistor.