公开(公告)号：US07297604B2

公开(公告)日：2007-11-20

申请号：US11154385

申请日：2005-06-16

申请人： Hwa-Sook Shin ,  Soo-Cheol Lee

发明人： Hwa-Sook Shin ,  Soo-Cheol Lee

IPC分类号： H01L21/762

CPC分类号： H01L29/66712 ,  H01L21/761 ,  H01L21/76237 ,  H01L21/8249 ,  H01L29/7809

摘要： In a semiconductor device having a dual isolation structure, and a method of fabricating the same, an epitaxial layer is formed on the entire surface of the semiconductor device. A device region including the semiconductor device and the epitaxial layer is defined by a device isolation layer. The device isolation layer has a dual structure that includes a diffused isolation layer and a trench isolation layer. The diffused isolation layer is formed in the semiconductor substrate, and surrounds the base and the bottom sidewall of the device region, and the trench isolation layer surrounds the upper sidewall of the device region by vertically penetrating the epitaxial layer. The method of fabricating a semiconductor device is performed by forming a diffused bottom isolation layer at a predetermined region in the semiconductor substrate, and forming a trench exposed at a predetermined region of the semiconductor substrate by patterning the epitaxial layer formed on the entire surface of the semiconductor substrate. A diffused isolation wall is formed to be connected to the diffused bottom isolation layer under the trench. A trench isolation structure is formed to be connected to the diffused isolation wall by filling an insulating layer inside the trench.

摘要翻译： 在具有双重隔离结构的半导体器件及其制造方法中，在半导体器件的整个表面上形成外延层。 包括半导体器件和外延层的器件区域由器件隔离层限定。 器件隔离层具有包括扩散隔离层和沟槽隔离层的双重结构。 扩散隔离层形成在半导体衬底中，并且围绕器件区域的基极和底部侧壁，并且沟槽隔离层通过垂直穿透外延层包围器件区域的上侧壁。 制造半导体器件的方法是通过在半导体衬底中的预定区域处形成扩散的底部隔离层，并且通过对形成在半导体衬底的整个表面上的外延层进行图案化而形成在半导体衬底的预定区域上暴露的沟槽 半导体衬底。 扩散隔离壁形成为与沟槽下方的扩散底部隔离层连接。 通过在沟槽内填充绝缘层，形成沟槽隔离结构以连接到扩散隔离壁。

公开(公告)号：US20050233541A1

公开(公告)日：2005-10-20

申请号：US11154385

申请日：2005-06-16

申请人： Hwa-Sook Shin ,  Soo-Cheol Lee

发明人： Hwa-Sook Shin ,  Soo-Cheol Lee

IPC分类号： H01L21/74 ,  H01L21/336 ,  H01L21/76 ,  H01L21/761 ,  H01L21/762 ,  H01L21/8249 ,  H01L27/06 ,  H01L27/08 ,  H01L27/088 ,  H01L29/78

CPC分类号： H01L29/66712 ,  H01L21/761 ,  H01L21/76237 ,  H01L21/8249 ,  H01L29/7809

摘要： In a semiconductor device having a dual isolation structure, and a method of fabricating the same, an epitaxial layer is formed on the entire surface of the semiconductor device. A device region including the semiconductor device and the epitaxial layer is defined by a device isolation layer. The device isolation layer has a dual structure that includes a diffused isolation layer and a trench isolation layer. The diffused isolation layer is formed in the semiconductor substrate, and surrounds the base and the bottom sidewall of the device region, and the trench isolation layer surrounds the upper sidewall of the device region by vertically penetrating the epitaxial layer. The method of fabricating a semiconductor device is performed by forming a diffused bottom isolation layer at a predetermined region in the semiconductor substrate, and forming a trench exposed at a predetermined region of the semiconductor substrate by patterning the epitaxial layer formed on the entire surface of the semiconductor substrate. A diffused isolation wall is formed to be connected to the diffused bottom isolation layer under the trench. A trench isolation structure is formed to be connected to the diffused isolation wall by filling an insulating layer inside the trench.

公开(公告)号：US06286628B1

公开(公告)日：2001-09-11

申请号：US09492786

申请日：2000-01-28

申请人： Soo-Cheol Lee

发明人： Soo-Cheol Lee

IPC分类号： B66B300

CPC分类号： B66B1/3484 ,  B66B1/304

摘要： An apparatus and a method for detecting a load amount of an elevator which detects the weight of the passengers of an elevator car in an elevator system including the steps of: setting an output data of a load detector for at least two load amounts between an no-load and full load; obtaining a non-linear relational function expression between the output data of the load detector and the load amounts on the basis of the set data; selecting one of the at least two functional expressions on the basis of the relational function expressions, and detecting and outputting a load amount for the passengers of the elevator car, and a method for detecting a load compensation amount of an elevator in which the initial starting torque of the drive motor is controlled according to passenger of the elevator car, including the steps of: setting load compensation amounts for at least two positions of an elevator car between the lowermost floor and the uppermost floor where the elevator is moved; obtaining a non-linear relational function expression between the position of the elevator car and the load compensation amount on the basis of the data for the set compensation amount, of which the relational function expression is divided into one or more intervals, for which respective polynomials are derived; and detecting a load compensation amount for the position of the elevator car on the basis of the relational function expression.

摘要翻译： 一种用于检测在电梯系统中检测电梯轿厢的乘客的重量的电梯的装载量的装置和方法，包括以下步骤：将负载检测器的输出数据设置为不在 装载和满载; 基于所设定的数据，获得负载检测器的输出数据与负载量之间的非线性关系函数表达式; 基于所述关系函数表达式选择所述至少两个功能表达式中的一个，以及检测和输出所述电梯轿厢的乘客的负载量，以及用于检测电梯的负载补偿量的方法，其中所述初始起动 根据电梯轿厢的乘客来控制驱动电动机的转矩，包括以下步骤：在电梯的最下层和最上层之间设置电梯轿厢的至少两个位置的负载补偿量; 根据用于设定补偿量的数据，将该关系函数表达式分成一个或多个间隔，获得电梯轿厢的位置和负载补偿量之间的非线性关系函数表达式， 派生; 并根据关系函数表达式检测电梯轿厢的位置的负载补偿量。

公开(公告)号：US5073513A

公开(公告)日：1991-12-17

申请号：US672575

申请日：1991-03-20

申请人： Soo-Cheol Lee

发明人： Soo-Cheol Lee

IPC分类号： G11C16/04 ,  H01L21/28 ,  H01L21/768 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788

CPC分类号： H01L27/11517 ,  G11C16/0425 ,  H01L21/2815 ,  H01L21/28273 ,  H01L21/76801 ,  H01L27/115 ,  H01L29/42376 ,  H01L29/7885

摘要： A nonvolatile semiconductor memory device is provided including a doped semiconductor substrate and three gate conductor layers electrically insulated from each other in the cell area on the substrate. A first floating gate conductor layer is formed on the substrate and covered by a second control gate conductor layer, forming a twofold polycrystalline silicon structure. A third select gate conductor layer is formed along one side wall of the twofold structure of the floating gate and control gate conductor layers, having a side wall spacer structure. The first conductor layer serves as a floating gate; the second conductor layer serves as a control gate; and the third conductor layer serves as a select gate. A field oxide layer is provided to separate cells from each other. The control and the select gates are connected in a region between cells through the field oxide layer. By providing the third conductor in the form of a side wall spacer, the cell area can be greatly reduced.

公开(公告)号：US06773995B2

公开(公告)日：2004-08-10

申请号：US10377806

申请日：2003-03-04

申请人： Hwa-Sook Shin ,  Soo-Cheol Lee

发明人： Hwa-Sook Shin ,  Soo-Cheol Lee

IPC分类号： H01L21336

CPC分类号： H01L29/7809 ,  H01L21/823487 ,  H01L29/0653 ,  H01L29/41766

摘要： A method of manufacturing a semiconductor device, such as a double-diffused metal oxide semiconductor (DMOS) transistor, where a first layer may be formed on a semiconductor substrate, with isolation trenches formed in the first layer and semiconductor substrate, and with the trenches being filled with an isolation layer. A second layer may be formed on the first layer and semiconductor substrate, and a plurality of drain trenches may be formed therein. A pair of plug-type drains may be formed in the trenches, to be separated from the isolation layer by a dielectric spacer. Gates and source areas may be formed on a resultant structure containing the plug-type drains. Accordingly, current may be increased with a reduction in drain-source on resistance, and an area of the isolation layer can be reduced, as compared to an existing isolation layer, potentially resulting in a reduction in chip area.

摘要翻译： 一种制造半导体器件的方法，例如双扩散金属氧化物半导体（DMOS）晶体管，其中可以在半导体衬底上形成第一层，在第一层和半导体衬底中形成隔离沟槽，并且与沟槽 充满隔离层。 可以在第一层和半导体衬底上形成第二层，并且可以在其中形成多个漏极沟槽。 可以在沟槽中形成一对插塞型漏极，以通过介电隔离物与隔离层分离。 栅极和源极区域可以形成在包含插塞型漏极的结构结构上。 因此，与现有隔离层相比，电流可以随着漏源电阻的减小而增加，并且可以减小隔离层的面积，从而潜在地导致芯片面积的减小。

公开(公告)号：US06482662B1

公开(公告)日：2002-11-19

申请号：US09546527

申请日：2000-04-10

申请人： Soo-Cheol Lee ,  Jong-Hyon Ahn

发明人： Soo-Cheol Lee ,  Jong-Hyon Ahn

IPC分类号： H01L2166

CPC分类号： G03F7/70625 ,  G03F1/70 ,  G03F7/70433 ,  H01L22/20 ,  Y10S438/945

摘要： A method of fabricating a semiconductor device is provided that includes forming first and second gate electrodes on a substrate via a first photo mask, in which the first and second gate electrodes are in a longitudinal direction parallel to respective channels arranged in x-axis y-axis directions, measuring and comparing the lengths of the first and second gate electrodes on the substrate, estimating a mask bias on the basis of the difference between the actually measured lengths of the gate electrodes, and forming patterns of the first and second gate electrodes of which lengths are adjusted with the estimated mask bias on a new second photo mask, so that the first and second gate electrodes of the same length are formed on the same substrate via the new, second photo mask, regardless of the arrangement directions of the gate electrodes in parallel to channels. This has the effect of improving the processing speed of high CPU or logic element and the yield of products manufactured by this process.

摘要翻译： 提供一种制造半导体器件的方法，其包括通过第一光掩模在衬底上形成第一和第二栅电极，其中第一和第二栅电极在与x轴y轴方向上排列的各通道平行的纵向方向上， 测量和比较衬底上的第一和第二栅电极的长度，基于实际测量的栅极电极长度之差估计掩模偏压，以及形成第一和第二栅电极的图形 这些长度随着新的第二光掩模上的估计掩模偏置而被调整，使得经由新的第二光掩模，在同一基板上形成相同长度的第一和第二栅电极，而不管栅极的排列方向如何 电极平行于通道。 这具有提高高CPU或逻辑元件的处理速度和通过该过程制造的产品的产量的效果。

公开(公告)号：US06202796B1

公开(公告)日：2001-03-20

申请号：US09276121

申请日：1999-03-25

申请人： Soo-Cheol Lee

发明人： Soo-Cheol Lee

IPC分类号： B66B128

CPC分类号： B66B1/30 ,  B66B1/285

摘要： In a position controlling apparatus and method for an elevator which controls a position of an elevator in accordance with a velocity command profile consisting of an acceleration region, a uniform velocity region and a deceleration region, a position controlling apparatus and method according to the present invention controls generation of a synchronization position error in the deceleration region. The position controlling method for the elevator of the invention includes the steps of: determining a deceleration starting point of a deceleration profile region; previously storing a command position corresponding to the time elapsed after the deceleration starting point; dividing the command position into a plurality of position regions; differently establishing computing formulas of a velocity command by each position region; determining the position region to which the command position at a present time belongs; computing a second velocity command value in accordance with a time using the computing formula corresponding to the determined position region at the present time; and controlling a position of the elevator car in accordance with the second velocity command value after the deceleration starting point.

摘要翻译： 在根据本发明的加速区域，均匀速度区域和减速区域构成的速度指令曲线来控制电梯的位置的电梯的位置控制装置和方法中， 控制减速区域中的同步位置误差的产生。 本发明的电梯的位置控制方法包括以下步骤：确定减速曲线区域的减速开始点; 预先存储与减速开始点之后经过的时间相对应的命令位置; 将命令位置分成多个位置区域; 不同地建立每个位置区域的速度指令的计算公式; 确定当前所属命令位置所属的位置区域; 使用与当前确定的位置区域相对应的计算公式根据时间计算第二速度命令值; 以及根据所述减速开始点之后的所述第二速度指令值来控制所述电梯轿厢的位置。

公开(公告)号：US5142436A

公开(公告)日：1992-08-25

申请号：US657743

申请日：1991-02-19

申请人： Soo-Cheol Lee ,  Kwang-Hee Jung ,  Chi-Ho Kim

发明人： Soo-Cheol Lee ,  Kwang-Hee Jung ,  Chi-Ho Kim

IPC分类号： H01G4/12 ,  H01G2/02 ,  H01G2/10 ,  H01G4/224 ,  H01G4/228 ,  H01G4/35

CPC分类号： H01G4/228 ,  H01G4/224 ,  H01G4/35

摘要： This invention relates to a piercing through type capacitor used in high voltage high frequency wave device, which is comprised of: ceramic disc having two separated electrodes on top surface and common electrode on bottom surface; grounding plate which is made by a locating means of elongated oval shape to be laid with said ceramic disc thereon, an elongated oval protuberance having large elongated oval piercing through opening at central portion, and a number of small piercing through holes around said elongated oval protuberance with keeping a predetermined distance therefrom; insulation case of elongated oval hollow column which is made integrally with upper and lower insulation case for surrounding the ceramic disc at both sides of said grounding plate; a pair of piercing through conductors in which a pair of metal caps which are provided to each of said two separated electrodes on the top surface of said ceramic disc and having protrusions at each periphery are fixed by soldering or welding; a pair of insulation tubes for covering each piercing through bar of said piercing through conductor, and epoxy insulation resin material filled to a part of upper portion and to a part of lower portion of said integral type insulation case.

摘要翻译： 本发明涉及一种高压高频装置中使用的穿透式电容器，其特征在于：具有在上表面具有两个分开的电极的陶瓷盘和底表面上的公共电极; 接地板，其由长椭圆形的定位装置制成，其上放置有所述陶瓷盘;细长的椭圆形突起，其具有穿过中心部分的开口的大的细长椭圆形，以及围绕所述细长椭圆形突起的多个小穿孔 与其保持预定的距离; 绝缘壳体，其与上下绝缘壳体整体制成，用于围绕所述接地板两侧的陶瓷盘; 一对贯穿导体，其中在所述陶瓷盘的顶表面上设置有每个所述两个分开的电极并且在每个周边具有突起的一对金属盖通过焊接或焊接固定; 一对绝缘管，用于覆盖穿过导体的每个穿刺杆，以及填充到所述整体式绝缘壳体的上部和下部的一部分的环氧绝缘树脂材料。

公开(公告)号：US07808468B2

公开(公告)日：2010-10-05

申请号：US11445805

申请日：2006-06-03

申请人： Kyoung-Mok Son ,  Soo-Cheol Lee

发明人： Kyoung-Mok Son ,  Soo-Cheol Lee

IPC分类号： G09G3/36 ,  H03K19/094

CPC分类号： H03K17/165 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0291

摘要： A source driver for controlling a slew rate of a liquid crystal display (LCD) and a method for controlling the slew rate is provided. The source driver includes a plurality of output buffers for driving data lines, and a bias circuit for varying a bias voltage inputted to the output buffers to control a slew rate of the output buffers.

摘要翻译： 提供了用于控制液晶显示器（LCD）的转换速率的源极驱动器和用于控制压摆率的方法。 源极驱动器包括用于驱动数据线的多个输出缓冲器和用于改变输入到输出缓冲器的偏置电压以控制输出缓冲器的转换速率的偏置电路。

公开(公告)号：US07419880B2

公开(公告)日：2008-09-02

申请号：US11705355

申请日：2007-02-12

申请人： Tae-Jung Lee ,  Soo-Cheol Lee ,  Dong-Ryul Chang

发明人： Tae-Jung Lee ,  Soo-Cheol Lee ,  Dong-Ryul Chang

IPC分类号： H01L21/336

CPC分类号： H01L29/7816 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/0882 ,  H01L29/66628 ,  H01L29/66659 ,  H01L29/66689 ,  H01L29/7834 ,  H01L29/7835

摘要： A field effect transistor includes a gate that is formed in a channel region of an active region defined on a substrate. A source is formed at a first surface portion of the active region that is adjacently disposed at a first side face of the gate. A drain is formed at a second surface portion of the active region that is opposite to the first surface portion with respect to the gate. The drain has a protruded portion that is protruded from a surface portion of the substrate.

摘要翻译： 场效应晶体管包括形成在限定在衬底上的有源区的沟道区中的栅极。 源极形成在相邻地设置在栅极的第一侧面的有源区的第一表面部分处。 在有源区域的与栅极相对的第一表面部分的第二表面部分处形成漏极。 漏极具有从基板的表面部突出的突出部。