METHOD OF EMBEDDING TAMPER PROOF LAYERS AND
DISCRETE COMPONENTS INTO PRINTED CIRCUIT BOARD STACK-UP
    1.
    发明申请

    公开(公告)号:US20060086534A1

    公开(公告)日:2006-04-27

    申请号:US11163609

    申请日:2005-10-25

    IPC分类号: H05K1/11 H01R12/04

    摘要: A method for embedding tamper proof layers and discrete components into a printed circuit board stack-up is disclosed. According to this method, a plating mask is applied on a base substrate to cover partially one of its faces. Conductive ink is then spread on this face so as to fill the gap formed by the plating mask. To obtain a uniform distribution of the conductive ink and then gel it, the conductive ink is preferably heated. A dielectric layer is applied on the conductive ink layer and the polymerization process is ended to obtain a strong adhesion between these two layers. In a preferred embodiment, conductive tracks are simultaneously designed on the other face of the base substrate to reduce thermo-mechanical strains and deformations.

    摘要翻译: 公开了一种将防篡改层和分立元件嵌入到印刷电路板叠层中的方法。 根据该方法,将电镀掩模施加在基底基板上以部分地覆盖其一个面。 然后在该表面上扩散导电油墨,以填充由电镀掩模形成的间隙。 为了获得导电油墨的均匀分布,然后使其凝胶化,优选加热导电油墨。 在导电油墨层上施加电介质层,结束聚合过程,以获得这两层之间的强粘合性。 在优选实施例中,导电轨道同时设计在基底基板的另一面上,以减少热机械应变和变形。

    Protection of Secure Electronic Modules Against Attacks
    2.
    发明申请
    Protection of Secure Electronic Modules Against Attacks 失效
    保护安全电子模块免受攻击

    公开(公告)号:US20080222430A1

    公开(公告)日:2008-09-11

    申请号:US11682349

    申请日:2007-03-06

    IPC分类号: G06F12/14

    CPC分类号: G06F21/86 G06F2221/2143

    摘要: A method and apparatus is disclosed for preventing the unintended retention of secret data caused by preferred state/burn in secure electronic modules. Sequentially storing the data, and its inverse on alternating clock cycles, and by actively overwriting it to destroy it, prevents SRAM devices from developing a preferred state. By encrypting a relatively large amount of secret data with a master encryption key, and storing said master key in this non-preferred state storage, the electronic module conveniently extends this protection scheme to a large amount of data, without the overhead of investing or actively erasing the larger storage area.

    摘要翻译: 公开了一种用于防止在安全电子模块中由优选状态/烧伤引起的秘密数据的意外保留的方法和装置。 顺序存储数据及其在交替时钟周期上的反相,并通过主动覆盖数据来破坏数据,从而防止SRAM器件发展成优先状态。 通过使用主加密密钥加密相对大量的秘密数据,并将所述主密钥存储在该非优选状态存储器中,电子模块便于将该保护方案扩展到大量的数据,而无需投入或主动地开销 擦除较大的存储区域。

    Protection of secure electronic modules against attacks
    3.
    发明授权
    Protection of secure electronic modules against attacks 失效
    保护安全的电子模块免受攻击

    公开(公告)号:US07953987B2

    公开(公告)日:2011-05-31

    申请号:US11682349

    申请日:2007-03-06

    IPC分类号: G06F12/14

    CPC分类号: G06F21/86 G06F2221/2143

    摘要: A method and apparatus is disclosed for preventing the unintended retention of secret data caused by preferred state/burn-in in secure electronic modules. Sequentially storing the data and its inverse on alternating clock cycles, and by actively overwriting it to destroy it, prevents SRAM devices from developing a preferred state. By encrypting a relatively large amount of secret data with a master encryption key, and storing said master key in this non-preferred state storage, the electronic module conveniently extends this protection scheme to a large amount of data, without the overhead of investing or actively erasing the larger storage area.

    摘要翻译: 公开了一种用于防止由安全电子模块中的优选状态/老化引起的秘密数据的意外保留的方法和装置。 在交替的时钟周期内顺序存储数据及其反相,并通过主动覆盖数据来破坏数据,从而防止SRAM器件发展成优先状态。 通过使用主加密密钥加密相对大量的秘密数据,并将所述主密钥存储在该非优选状态存储器中,电子模块便于将该保护方案扩展到大量的数据,而无需投入或主动地开销 擦除较大的存储区域。

    Method of embedding tamper proof layers and discrete components into printed circuit board stack-up
    4.
    发明授权
    Method of embedding tamper proof layers and discrete components into printed circuit board stack-up 有权
    将防篡改层和分立元件嵌入到印刷电路板堆叠中的方法

    公开(公告)号:US07703201B2

    公开(公告)日:2010-04-27

    申请号:US11163609

    申请日:2005-10-25

    IPC分类号: H01K3/00

    摘要: A method for embedding tamper proof layers and discrete components into a printed circuit board stack-up is disclosed. According to this method, a plating mask is applied on a base substrate to cover partially one of its faces. Conductive ink is then spread on this face so as to fill the gap formed by the plating mask. To obtain a uniform distribution of the conductive ink and then gel it, the conductive ink is preferably heated. A dielectric layer is applied on the conductive ink layer and the polymerization process is ended to obtain a strong adhesion between these two layers. In a preferred embodiment, conductive tracks are simultaneously designed on the other face of the base substrate to reduce thermo-mechanical strains and deformations.

    摘要翻译: 公开了一种将防篡改层和分立元件嵌入到印刷电路板叠层中的方法。 根据该方法,将电镀掩模施加在基底基板上以部分地覆盖其一个面。 然后在该表面上扩散导电油墨,以填充由电镀掩模形成的间隙。 为了获得导电油墨的均匀分布,然后使其凝胶化,优选加热导电油墨。 在导电油墨层上施加电介质层,结束聚合过程,以获得这两层之间的强粘合性。 在优选实施例中,导电轨道同时设计在基底基板的另一面上,以减少热机械应变和变形。

    Providing nondeterministic data
    5.
    发明授权
    Providing nondeterministic data 失效
    提供非确定性数据

    公开(公告)号:US08631058B2

    公开(公告)日:2014-01-14

    申请号:US12915003

    申请日:2010-10-28

    IPC分类号: G06F7/58

    摘要: A system and method for providing non-deterministic data for processes executed by non-synchronized processor elements of a fault resilient system is discussed. The steps of the method comprise receiving a request for getting non-deterministic data from a requesting processor element; assigning non-deterministic data generated by an entropy source to the request; and supplying the non-deterministic data assigned to the request, to the requesting processor element.

    摘要翻译: 讨论了用于为故障恢复系统的非同步处理器元件执行的处理提供非确定性数据的系统和方法。 所述方法的步骤包括从请求处理器元件接收获取非确定性数据的请求; 将由熵源产生的非确定性数据分配给所述请求; 以及将分配给该请求的非确定性数据提供给请求处理器元件。

    CONFIGURABLE INTEGRATED TAMPER DECTECTION CIRCUITRY
    6.
    发明申请
    CONFIGURABLE INTEGRATED TAMPER DECTECTION CIRCUITRY 失效
    可配置集成式夯锤保护电路

    公开(公告)号:US20120278905A1

    公开(公告)日:2012-11-01

    申请号:US13096381

    申请日:2011-04-28

    IPC分类号: G06F21/02

    CPC分类号: G06F21/86

    摘要: Tamper detection circuitry includes a first surface layer surrounding a protected memory, the first surface layer comprising a first plurality of conductive sections; a second surface layer surrounding the protected memory, the second surface layer comprising a second plurality of conductive sections; a programmable interconnect located inside the first surface layer, the programmable interconnect being connected to each conductive section by a plurality of conductive traces, the programmable interconnect being configured to group the conductive section of the first and second plurality of conductive sections into a plurality of circuits, each of the plurality of circuits having a different respective voltage; and a tamper detection module, the tamper detection module configured to detect tampering in the event that a conductive section that is part of a first circuit comes into physical contact with a conductive section that is part of a second circuit.

    摘要翻译: 防篡改检测电路包括围绕受保护存储器的第一表面层,第一表面层包括第一多个导电部分; 围绕被保护的存储器的第二表面层,所述第二表面层包括第二多个导电部分; 位于所述第一表面层内部的可编程互连,所述可编程互连通过多个导电迹线连接到每个导电部分,所述可编程互连配置为将所述第一和第二多个导电部分的导电部分分组成多个电路 所述多个电路中的每一个具有不同的相应电压; 以及篡改检测模块,所述篡改检测模块被配置为在作为第一电路的一部分的导电部分与作为第二电路的一部分的导电部分物理接触的情况下检测篡改。

    Indirectly-accessed, hardware-affine channel storage in transaction-oriented DMA-intensive environments
    7.
    发明授权
    Indirectly-accessed, hardware-affine channel storage in transaction-oriented DMA-intensive environments 失效
    在面向事务的DMA密集型环境中间接访问,硬件仿射通道存储

    公开(公告)号:US08140792B2

    公开(公告)日:2012-03-20

    申请号:US12392282

    申请日:2009-02-25

    IPC分类号: G06F13/00

    CPC分类号: G06F12/1081

    摘要: Embodiments of the invention provide a method, system, and computer program product for managing a computer memory system including a channel controller and a memory area. In one embodiment, the method comprises the channel controller receiving a request including a header and a payload, and separating said memory area into a working memory area and an auxiliary memory area. A copy of the header is deposited in the working memory area; and a full copy of the request, including a copy of the header and a copy of the payload, is deposited in the auxiliary memory area. The copy of the request in the auxiliary memory area is used to perform hardware operations; and the copy of the header in the working memory area is used to perform software operations.

    摘要翻译: 本发明的实施例提供了一种用于管理包括通道控制器和存储区域的计算机存储器系统的方法,系统和计算机程序产品。 在一个实施例中,该方法包括信道控制器接收包括头部和有效载荷的请求,并将所述存储区域分成工作存储器区域和辅助存储器区域。 标题的副本存放在工作存储器区域中; 并且包括标题的副本和有效载荷的副本的请求的完整副本被存储在辅助存储器区域中。 辅助存储器区域中的请求副本用于执行硬件操作; 并且使用工作存储器区域中的标题的副本来执行软件操作。

    Communications channel interposer, method and program product for verifying integrity of untrusted subsystem responses to a request
    8.
    发明授权
    Communications channel interposer, method and program product for verifying integrity of untrusted subsystem responses to a request 有权
    通信通道插入器,方法和程序产品,用于验证不可信子系统对请求的响应的完整性

    公开(公告)号:US07921234B2

    公开(公告)日:2011-04-05

    申请号:US12407879

    申请日:2009-03-20

    IPC分类号: G06F3/00 G06F11/00

    摘要: In a communications channel coupled to multiple duplicated subsystems, a method, interposer and program product are provided for verifying integrity of subsystem responses. Within the communications channel, a first checksum is calculated with receipt of a first response from a first subsystem responsive to a common request, and a second checksum is calculated for a second response of a second subsystem received responsive to the common request. The first checksum and the second checksum are compared, and if matching, only one of the first response and the second response is forwarded from the communications channel as the response to the common request, with the other of the first response and the second response being discarded by the communications channel.

    摘要翻译: 在耦合到多个重复子系统的通信信道中,提供了用于验证子系统响应的完整性的方法,插入器和程序产品。 在通信信道中,响应于公共请求从第一子系统接收到第一响应来计算第一校验和,并且响应于公共请求而接收响应于第二子系统的第二响应的第二校验和。 比较第一校验和和第二校验和,如果匹配,则只有第一响应和第二响应中的仅一个作为对公共请求的响应从通信信道转发,第一响应和第二响应中的另一个为 由通信信道丢弃。

    Communications channel method for verifying integrity of untrusted subsystem responses to a request
    9.
    发明授权
    Communications channel method for verifying integrity of untrusted subsystem responses to a request 失效
    用于验证不可信子系统响应请求的完整性的通信信道方法

    公开(公告)号:US07516246B2

    公开(公告)日:2009-04-07

    申请号:US11260285

    申请日:2005-10-27

    IPC分类号: G06F3/00 G06F11/00

    摘要: In a communications channel coupled to multiple duplicated subsystems, a method, interposer and program product are provided for verifying integrity of subsystem responses. Within the communications channel, a first checksum is calculated with receipt of a first response from a first subsystem responsive to a common request, and a second checksum is calculated for a second response of a second subsystem received responsive to the common request. The first checksum and the second checksum are compared, and if matching, only one of the first response and the second response is forwarded from the communications channel as the response to the common request, with the other of the first response and the second response being discarded by the communications channel.

    摘要翻译: 在耦合到多个重复子系统的通信信道中,提供了用于验证子系统响应的完整性的方法,插入器和程序产品。 在通信信道中,响应于公共请求从第一子系统接收到第一响应来计算第一校验和,并且响应于公共请求而接收响应于第二子系统的第二响应的第二校验和。 比较第一校验和和第二校验和,如果匹配,则只有第一响应和第二响应中的仅一个作为对公共请求的响应从通信信道转发,第一响应和第二响应中的另一个为 由通信信道丢弃。

    Code updates in processing systems
    10.
    发明授权
    Code updates in processing systems 有权
    处理系统中的代码更新

    公开(公告)号:US09069966B2

    公开(公告)日:2015-06-30

    申请号:US13270593

    申请日:2011-10-11

    摘要: A method for updating code images in a system includes booting a first image of a code with a sub-system processor, receiving a second image of the code, performing a security and reliability check of the second image of the code with the sub-system processor, determining whether the security and reliability check of the second image of the code is successful, storing the second image of the code in a first memory device responsive to determining that the security and reliability check of the second image of the code is successful, designating the second image of the code as an active image, and sending the second image of the code to a second memory device, the second memory device communicatively connected with the first memory device and a main processor.

    摘要翻译: 一种用于更新系统中的代码图像的方法包括用子系统处理器引导代码的第一图像,接收代码的第二图像,使用子系统执行代码的第二图像的安全性和可靠性检查 处理器,确定代码的第二图像的安全性和可靠性检查是否成功,将代码的第二图像存储在第一存储器设备中,以响应于确定代码的第二图像的安全性和可靠性检查成功, 将代码的第二图像指定为活动图像,以及将代码的第二图像发送到第二存储器设备,与第一存储器设备和主处理器通信地连接的第二存储器设备。