摘要:
Systems and methods of predicting instruction branches provide for independent checking predictions and dynamic next-line predictions. Next-line predictions may also have a latency that is a plurality of clock cycles, where the next line predictions include group predictions. Each group prediction includes a plurality of target addresses corresponding to their plurality of clock cycles. The plurality of target addresses can include a leaf target and one or more intermediate targets, where the leaf target defines a target address of the group prediction.
摘要:
Methods and apparatus to identify memory communications are described. In one embodiment, an access to a stack pointer is monitored, e.g., to maintain a stack tracker structure. The information stored in the stack tracker structure may be utilized to generate a distance value corresponding to a relative distance between a load instruction and a previous store instruction.
摘要:
Systems and methods of processing branch instructions provide for a bimodal predictor and a plurality of global predictors. The bimodal predictor is coupled to a prediction selector, where the bimodal predictor generates a bimodal prediction for branch instructions. The plurality of global predictors is coupled to the prediction selector, where each global predictor generates a corresponding global prediction for a branch instruction using different history or stew lengths. The prediction selector selects branch predictions from the bimodal prediction and the global predictions in order to arbitrate between predictors. The arbitration, update, and allocation schemes are designed to choose the most accurate predictor for each branch. Lower level predictors are used as filters to increase effective predictor capacity. Allocate and update schemes minimize aliasing between predictors. Branch predictors incorporating a plurality of global predictors in this fashion are more adaptive than conventional predictors with fixed branch history lengths and are able to achieve superior accuracy.
摘要:
Microarchitecture policies and structures to predict execution clusters and facilitate inter-cluster communication are disclosed. In disclosed embodiments, sequentially ordered instructions are decoded into micro-operations. Execution of one set of micro-operations is predicted to involve execution resources to perform memory access operations and inter-cluster communication, but not to perform branching operations. Execution of a second set of micro-operations is predicted to involve execution resources to perform branching operations but not to perform memory access operations. The micro-operations are partitioned for execution in accordance with these predictions, the first set of micro-operations to a first cluster of execution resources and the second set of micro-operations to a second cluster of execution resources. The first and second sets of micro-operations are executed out of sequential order and are retired to represent their sequential instruction ordering.
摘要:
Embodiments of the present invention provide a fast associativity collision array and cascaded priority select. An instruction fetch unit may receive an instruction and may search a primary data array and a collision data array for requested data. The instruction fetch unit may forward the requested data to a next pipeline stage. An instruction execution unit may perform a check to determine if the instruction is valid. If a conflict is detected at the primary data array, an array update unit may update the collision data array.
摘要:
Microarchitecture policies and structures partition execution resource clusters. In disclosed microarchitecture embodiments, micro-operations representing a sequential instruction ordering are partitioned into a two sets. To one set of micro-operations execution resources are allocated from a cluster of execution resources that can perform memory access operations but not branching operations. To the other set of micro-operations execution resources are allocated from a cluster of execution resources that can perform branching operations but not memory access operations. The first and second sets of micro-operations may be executed out of sequential order but are retired to represent their sequential instruction ordering.
摘要:
Ruggedized voice and data communication systems are disclosed having ruggedized enclosures for housing a communications board with at least one transceiver and a plurality of interfaces. The system has a power supply configured to receive a first voltage and convert the first voltage to a second voltage and provide the second voltage to the communications board.
摘要:
A flexible and extensible architecture allows for secure searching across an enterprise. Such an architecture can provide a simple Internet-like search experience to users searching secure content inside (and outside) the enterprise. The architecture allows for the crawling and searching of a variety of sources across an enterprise, regardless of whether any of these sources conform to a conventional user role model. The architecture further allows for security attributes to be submitted at query time, for example, in order to provide real-time secure access to enterprise resources. The user query also can be transformed to provide for dynamic querying that provides for a more current result list than can be obtained for static queries.
摘要:
A system and methodology for visually representing user activity associated with an information resource is described. User activities are associated with symbolic representations of those user activities. To visually convey selected aspects of the user activity, the activity is mapped to visual attributes that alter the appearance of the symbolic representation. The result is a dynamic and universal representation of user activities that aide online users to efficiently discern the relevancy and popularity of an information resource.
摘要:
A node card includes a substrate having a connector that communicates a plurality of signals between the substrate and an outside entity. One or more nodes are connected to the substrate, and the one or more nodes receive power from one or more signals communicated over the connector. The one or more nodes also communicate with the outside entity using the one or more signals communicated over the connector.