Method to recover patterned semiconductor wafers for rework
    1.
    发明授权
    Method to recover patterned semiconductor wafers for rework 失效
    恢复图案化半导体晶片进行返工的方法

    公开(公告)号:US08034718B2

    公开(公告)日:2011-10-11

    申请号:US12031726

    申请日:2008-02-15

    IPC分类号: H01L21/302

    CPC分类号: H01L21/02032

    摘要: Disclosed are embodiments of a method of removing patterned circuit structures from the surface of a semiconductor wafer. The method embodiments comprise blasting the surface of the semiconductor wafer with particles so as to remove substantially all of the patterned circuit structures. The blasting process is followed by one or more grinding, polishing and/or cleaning processes to remove any remaining circuit structures, to remove any lattice damage and/or to achieve a desired smoothness across the surface of the semiconductor wafer.

    摘要翻译: 公开了从半导体晶片的表面去除图案化电路结构的方法的实施例。 方法实施例包括用颗粒喷射半导体晶片的表面,以便基本上除去所有图案化的电路结构。 喷砂过程之后是一次或多次研磨,抛光和/或清洁工艺,以除去任何剩余的电路结构,去除任何晶格损伤和/或在半导体晶片的表面上实现期望的平滑度。

    METHOD TO RECOVER PATTERNED SEMICONDUCTOR WAFERS FOR REWORK
    2.
    发明申请
    METHOD TO RECOVER PATTERNED SEMICONDUCTOR WAFERS FOR REWORK 失效
    恢复图形化半导体晶体的方法

    公开(公告)号:US20080138989A1

    公开(公告)日:2008-06-12

    申请号:US12031726

    申请日:2008-02-15

    IPC分类号: H01L21/302

    CPC分类号: H01L21/02032

    摘要: Disclosed are embodiments of a method of removing patterned circuit structures from the surface of a semiconductor wafer. The method embodiments comprise blasting the surface of the semiconductor wafer with particles so as to remove substantially all of the patterned circuit structures. The blasting process is followed by one or more grinding, polishing and/or cleaning processes to remove any remaining circuit structures, to remove any lattice damage and/or to achieve a desired smoothness across the surface of the semiconductor wafer.

    摘要翻译: 公开了从半导体晶片的表面去除图案化电路结构的方法的实施例。 方法实施例包括用颗粒喷射半导体晶片的表面,以便基本上去除所有图案化的电路结构。 喷砂过程之后是一次或多次研磨,抛光和/或清洁工艺,以除去任何剩余的电路结构,去除任何晶格损伤和/或在半导体晶片的表面上实现期望的平滑度。

    Method to remove circuit patterns from a wafer
    3.
    发明授权
    Method to remove circuit patterns from a wafer 失效
    从晶片去除电路图案的方法

    公开(公告)号:US07666689B2

    公开(公告)日:2010-02-23

    申请号:US11609573

    申请日:2006-12-12

    IPC分类号: H01L21/00

    CPC分类号: B24C3/322

    摘要: A method holds wafers that contain patterned structures using a particle blasting tool. Next, the method directs particles at the patterned structures, such that the particles contact the patterned structures with a predetermined velocity and remove the patterned structures. This process of directing the particles at the wafer is controlled to stop directing the particles when substantially all of the patterned structures are removed from the wafer. This process also comprises selecting the particles to have a size equal to or less than 3 microns. For example, the particles can comprise aluminum oxide, silicon oxide, cerium, and/or a plastic. By maintaining the particle size equal to 3 microns or less, the blasting produces a substantially smooth wafer surface, thereby omitting the need for subsequent wafer polishing. Further, the wafers produced by such processing do not exhibit the highly stress lattice and fragile nature of wafers processed by wet processing.

    摘要翻译: 一种方法使用颗粒喷砂工具保持包含图案化结构的晶片。 接下来,该方法将颗粒引导到图案化结构,使得颗粒以预定速度接触图案化结构并去除图案化结构。 当基本上将所有图案化结构从晶片上移除时,控制在晶片处引导颗粒的这个过程以停止引导颗粒。 该方法还包括选择具有等于或小于3微米尺寸的颗粒。 例如,颗粒可以包括氧化铝,氧化硅,铈和/或塑料。 通过保持等于3微米或更小的粒度,喷砂产生基本上平滑的晶片表面,从而省去了随后的晶片抛光的需要。 此外,通过这种处理制造的晶片不会表现出通过湿法加工处理的晶片的高应力晶格和脆性。

    Method to Remove Circuit Patterns from a Wafer
    4.
    发明申请
    Method to Remove Circuit Patterns from a Wafer 失效
    从晶圆去除电路图案的方法

    公开(公告)号:US20080139088A1

    公开(公告)日:2008-06-12

    申请号:US11609573

    申请日:2006-12-12

    IPC分类号: B24B1/00

    CPC分类号: B24C3/322

    摘要: A method holds wafers that contain patterned structures using a particle blasting tool. Next, the method directs particles at the patterned structures, such that the particles contact the patterned structures with a predetermined velocity and remove the patterned structures. This process of directing the particles at the wafer is controlled to stop directing the particles when substantially all of the patterned structures are removed from the wafer. This process also comprises selecting the particles to have a size equal to or less than 3 microns. For example, the particles can comprise aluminum oxide, silicon oxide, cerium, and/or a plastic. By maintaining the particle size equal to 3 microns or less, the blasting produces a substantially smooth wafer surface, thereby omitting the need for subsequent wafer polishing. Further, the wafers produced by such processing do not exhibit the highly stress lattice and fragile nature of wafers processed by wet processing.

    摘要翻译: 一种方法使用颗粒喷砂工具保持包含图案化结构的晶片。 接下来,该方法将颗粒引导到图案化结构,使得颗粒以预定速度接触图案化结构并去除图案化结构。 当基本上将所有图案化结构从晶片上移除时,控制在晶片处引导颗粒的这个过程以停止引导颗粒。 该方法还包括选择具有等于或小于3微米尺寸的颗粒。 例如,颗粒可以包括氧化铝,氧化硅,铈和/或塑料。 通过保持等于3微米或更小的粒度,喷砂产生基本上平滑的晶片表面,从而省去了随后的晶片抛光的需要。 此外,通过这种处理制造的晶片不会表现出通过湿法加工处理的晶片的高应力晶格和脆性。

    Slurryless mechanical planarization for substrate reclamation
    5.
    发明授权
    Slurryless mechanical planarization for substrate reclamation 有权
    无衬底机械平面化用于衬底回收

    公开(公告)号:US08210904B2

    公开(公告)日:2012-07-03

    申请号:US12111276

    申请日:2008-04-29

    IPC分类号: B24B1/00

    摘要: A patterned portion of a patterned semiconductor substrate is removed by abrasive mechanical planarization employing an abrasive pad but without employing any slurry. Preferably, water is supplied to enhance the removal rate during the mechanical planarization. The removal rate of material is substantially independent for common materials employed in back-end-of-line (BEOL) semiconductor materials, which enables non-selective removal of the material containing metallization structures. The removal rate of silicon is lower than the removal rate for the BEOL semiconductor materials, enabling a self-stopping planarization process.

    摘要翻译: 图案化半导体衬底的图案化部分通过使用研磨垫的磨料机械平面化除去,但不使用任何浆料。 优选地,在机械平面化期间供应水以提高去除率。 材料的去除速率对于后端行业(BEOL)半导体材料中采用的普通材料来说基本上是独立的,这使得能够非选择性地去除含有金属化结构的材料。 硅的去除率低于BEOL半导体材料的去除率,能够进行自我停止的平坦化处理。

    Slurryless Mechanical Planarization for Substrate Reclamation
    6.
    发明申请
    Slurryless Mechanical Planarization for Substrate Reclamation 有权
    无碴机械平面化基板回收

    公开(公告)号:US20090270017A1

    公开(公告)日:2009-10-29

    申请号:US12111276

    申请日:2008-04-29

    IPC分类号: B24B7/20 H01L21/304

    摘要: A patterned portion of a patterned semiconductor substrate is removed by abrasive mechanical planarization employing an abrasive pad but without employing any slurry. Preferably, water is supplied to enhance the removal rate during the mechanical planarization. The removal rate of material is substantially independent for common materials employed in back-end-of-line (BEOL) semiconductor materials, which enables non-selective removal of the material containing metallization structures. The removal rate of silicon is lower than the removal rate for the BEOL semiconductor materials, enabling a self-stopping planarization process.

    摘要翻译: 图案化半导体衬底的图案化部分通过使用研磨垫的磨料机械平面化除去,但不使用任何浆料。 优选地,在机械平面化期间供应水以提高去除率。 材料的去除速率对于后端行业(BEOL)半导体材料中采用的普通材料来说基本上是独立的,这使得能够非选择性地去除含有金属化结构的材料。 硅的去除率低于BEOL半导体材料的去除率,能够进行自我停止的平坦化处理。