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公开(公告)号：US08406076B2
公开(公告)日：2013-03-26
申请号：US12824703
申请日：2010-06-28
申请人： Steven S. Cheng , Peter Hwang , Annie C. Chang
发明人： Steven S. Cheng , Peter Hwang , Annie C. Chang
IPC分类号： G11C11/413
CPC分类号： G06F13/4239 , G06F13/4086 , Y02D10/14 , Y02D10/151
摘要： A method and apparatus for reducing power consumption during an operation in a non-volatile storage device is disclosed. A non-volatile storage device controller that is in communication with a non-volatile memory in the non-volatile storage device receives a characteristic corresponding to a time duration required for the non-volatile memory to complete an operation. The controller disables a circuit that indicates when an operation by the non-volatile memory is complete. The controller then initiates the operation in the non-volatile memory, and maintains the circuit in a disabled state for a first predetermined time that is a portion of the time duration. The controller enables the circuit upon expiration of the first predetermined time and prior to the completion of the operation. The controller receives an indication of the completion of the operation via the circuit.
摘要翻译： 公开了一种用于在非易失性存储装置中的操作期间降低功耗的方法和装置。 与非易失性存储设备中的非易失性存储器通信的非易失性存储设备控制器接收与非易失性存储器完成操作所需的持续时间相对应的特性。 控制器禁用指示非易失性存储器的操作何时完成的电路。 然后，控制器在非易失性存储器中启动操作，并且将电路保持在禁用状态，作为持续时间的一部分的第一预定时间。 控制器在第一预定时间到期并且在完成操作之前启用该电路。 控制器通过电路接收完成操作的指示。
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公开(公告)号：US20110320686A1
公开(公告)日：2011-12-29
申请号：US12824703
申请日：2010-06-28
申请人： Steven S. Cheng , Peter Hwang , Annie C. Chang
发明人： Steven S. Cheng , Peter Hwang , Annie C. Chang
CPC分类号： G06F13/4239 , G06F13/4086 , Y02D10/14 , Y02D10/151
摘要： A method and apparatus for reducing power consumption during an operation in a non-volatile storage device is disclosed. A non-volatile storage device controller that is in communication with a non-volatile memory in the non-volatile storage device receives a characteristic corresponding to a time duration required for the non-volatile memory to complete an operation. The controller disables a circuit that indicates when an operation by the non-volatile memory is complete. The controller then initiates the operation in the non-volatile memory, and maintains the circuit in a disabled state for a first predetermined time that is a portion of the time duration. The controller enables the circuit upon expiration of the first predetermined time and prior to the completion of the operation. The controller receives an indication of the completion of the operation via the circuit.
摘要翻译： 公开了一种用于在非易失性存储装置中的操作期间降低功耗的方法和装置。 与非易失性存储设备中的非易失性存储器通信的非易失性存储设备控制器接收与非易失性存储器完成操作所需的持续时间相对应的特性。 控制器禁用指示非易失性存储器的操作何时完成的电路。 然后，控制器在非易失性存储器中启动操作，并且将电路保持在禁用状态，作为持续时间的一部分的第一预定时间。 控制器在第一预定时间到期并且在完成操作之前启用该电路。 控制器通过电路接收完成操作的指示。
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公开(公告)号：US07953930B2
公开(公告)日：2011-05-31
申请号：US11952744
申请日：2007-12-07
申请人： Steven S. Cheng
发明人： Steven S. Cheng
IPC分类号： G06F13/00
CPC分类号： G06F12/0646 , G06F2212/2022
摘要： A memory card has a data scrambler that performs a data scrambling operation on data stored in the memory card according to a device ID associated with the memory card. The device ID is either set at the factory and permanently stored in the card, or configurable by a user or a host system.
摘要翻译： 存储卡具有数据扰乱器，其根据与存储卡相关联的设备ID对存储在存储卡中的数据执行数据加扰操作。 设备ID可以在出厂设置并永久存储在卡中，或由用户或主机系统配置。
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4.发明授权System, method and memory device providing data scrambling compatible with on-chip copy operation 有权提供与片上复制操作兼容的数据扰乱的系统，方法和存储器件公开(公告)号：US08301912B2
公开(公告)日：2012-10-30
申请号：US12345921
申请日：2008-12-30
申请人： Jason T. Lin , Steven S. Cheng , Shai Traister
发明人： Jason T. Lin , Steven S. Cheng , Shai Traister
IPC分类号： G06F12/14
CPC分类号： G11B20/0021 , G06F12/0246 , G06F12/1408 , G06F21/72 , G06F21/725 , G06F21/79 , G06F2212/1032 , G11C7/1006 , G11C11/5628 , G11C16/0483 , G11C16/3418 , G11C16/3427
摘要： Data scrambling techniques implemented externally to a flash memory device are disclosed which can be used in concert with flash memory on-chip copy functionality operating internally to the flash device, thus supporting high performance copying operations. All the data stored in the flash may be scrambled, including headers and control structures. Robust file system operation may be achieved, including the capability to tolerate a power loss at any time, and yet be able to relocate data internally within the flash without having to de-scramble and then re-scramble the data. An exemplary hardware based solution has little or no impact on overall system performance, and may be implemented at very low incremental cost to increase overall system reliability. The data scrambling technique preferably uses a logical address, such as logical block address or logical page address, rather than a physical address, to determine a seed scrambling key.
摘要翻译： 公开了在闪速存储器件外部实现的数据加扰技术，其可以与在闪存器件内部操作的闪存片上复制功能一起使用，从而支持高性能复制操作。 存储在闪存中的所有数据可能被加扰，包括报头和控制结构。 可以实现强大的文件系统操作，包括在任何时候容忍功率损耗的能力，并且还能够在闪存内部重新定位数据，而不必去除数据，然后重新加扰数据。 基于硬件的示例性解决方案对整个系统性能几乎没有或没有影响，并且可以以非常低的增量成本实现，以提高整体系统的可靠性。 数据加扰技术优选地使用诸如逻辑块地址或逻辑页地址的逻辑地址而不是物理地址来确定种子加密密钥。
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公开(公告)号：US07971023B2
公开(公告)日：2011-06-28
申请号：US12112204
申请日：2008-04-30
申请人： Steven S. Cheng , Stephen Tam
发明人： Steven S. Cheng , Stephen Tam
CPC分类号： G06F11/3433 , G06F11/3419 , G06F11/3452 , G06F2201/81
摘要： In order to maintain a memory system's performance levels to its end-of-life, latency threshold level(s) are specified and associated with different memory system operating parameters. In one embodiment, the memory system monitors and gathers performance statistics in real time, and in accordance with specific memory transfer sizes. A current latency level can be dynamically calculated using the performance statistics and compared to previously established latency threshold levels. If the current latency level is greater than or equal to a specific latency threshold level, the memory system's configuration setting can be adjusted according to the operating parameters associated with the latency threshold level to offset the increased latency.
摘要翻译： 为了将内存系统的性能级别维持到其使用寿命，延迟阈值级别被指定并与不同的存储器系统操作参数相关联。 在一个实施例中，存储器系统实时地监视和收集性能统计，并且根据特定的存储器传输大小。 可以使用性能统计信息动态计算当前延迟级别，并与之前确定的延迟阈值级别进行比较。 如果当前延迟级别大于或等于特定延迟阈值级别，则可以根据与延迟阈值级别相关联的操作参数来调整存储器系统的配置设置，以抵消延长的延迟。
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公开(公告)号：US20110271036A1
公开(公告)日：2011-11-03
申请号：US12770358
申请日：2010-04-29
CPC分类号： G06F1/24
摘要： A method and system for phasing power-intensive operations is disclosed. A non-volatile storage device controller detects a power reset. The controller is in communication with non-volatile memories in the non-volatile storage device. In response to detecting a power reset, the controller determines a current consumption necessary to reset the non-volatile memories in the non-volatile storage device. The controller simultaneously resets all of the non-volatile memories when the determined current consumption is less than a current consumption threshold. If the determined current consumption is greater than the current consumption threshold, the controller resets a first subset of the plurality of non-volatile memories, and after a predetermined delay, resets a second subset of the non-volatile memories. Therefore, a power-intensive operation may be performed without exceeding a current consumption threshold by dividing the operation into a sequence of steps that do not exceed the threshold.
摘要翻译： 公开了一种用于阶段性强力密集型操作的方法和系统。 非易失性存储设备控制器检测电源复位。 控制器与非易失性存储设备中的非易失性存储器通信。 响应于检测到电源复位，控制器确定复位非易失性存储设备中的非易失性存储器所需的电流消耗。 当确定的电流消耗小于电流消耗阈值时，控制器同时复位所有非易失性存储器。 如果确定的电流消耗大于当前消耗阈值，则控制器复位多个非易失性存储器的第一子集，并且在预定延迟之后，复位非易失性存储器的第二子集。 因此，通过将操作划分成不超过阈值的一系列步骤，可以不超过电流消耗阈值来执行功率密集型操作。
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公开(公告)号：US07873803B2
公开(公告)日：2011-01-18
申请号：US11861146
申请日：2007-09-25
申请人： Steven S. Cheng
发明人： Steven S. Cheng
IPC分类号： G06F12/00
CPC分类号： G06F11/1666 , G06F11/20 , G11C29/74 , G11C29/765
摘要： A nonvolatile memory array includes two or more devices, each device containing data that is scrambled using a different scrambling scheme. When the same data is provided and stored in both devices, different data patterns occur in each device, so that if one of the patterns causes data pattern induced errors, the original data can be recreated from another copy that does not share the same data pattern.
摘要翻译： 非易失性存储器阵列包括两个或更多个器件，每个器件包含使用不同的加扰方案加扰的数据。 当相同的数据被提供并存储在两个设备中时，在每个设备中出现不同的数据模式，使得如果其中一个模式导致数据模式引起的错误，则可以从不共享相同数据模式的另一个副本重新创建原始数据 。
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公开(公告)号：US4658394A
公开(公告)日：1987-04-14
申请号：US680398
申请日：1984-12-12
IPC分类号： H04B10/207 , H04B10/26 , H04B9/00
CPC分类号： H04B10/2587 , H04B10/272
摘要： An optical distribution architecture is disclosed wherein wavelength stabilized continuous wavelength lasers are centrally positioned in tandem with star couplers to distributed laser power among a plurality of lightguide paths. The laser power apportioned to each such path may then be locally or remotely modulated thereby reducing the number of lasers required to equip a network. Advantageously, lightguide fibres are single mode and polarization maintaining.
摘要翻译： 公开了一种光分布架构，其中波长稳定的连续波长激光器与星形耦合器串联在一起，以在多个光导路径之间分布激光功率。 然后分配给每个这样的路径的激光功率可以被本地或远程调制，从而减少装备网络所需的激光器的数量。 有利地，光导纤维是单模和偏振保持。
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公开(公告)号：US08924626B2
公开(公告)日：2014-12-30
申请号：US12770358
申请日：2010-04-29
CPC分类号： G06F1/24
摘要： A method and system for phasing power-intensive operations is disclosed. A non-volatile storage device controller detects a power reset. The controller is in communication with non-volatile memories in the non-volatile storage device. In response to detecting a power reset, the controller determines a current consumption necessary to reset the non-volatile memories in the non-volatile storage device. The controller simultaneously resets all of the non-volatile memories when the determined current consumption is less than a current consumption threshold. If the determined current consumption is greater than the current consumption threshold, the controller resets a first subset of the plurality of non-volatile memories, and after a predetermined delay, resets a second subset of the non-volatile memories. Therefore, a power-intensive operation may be performed without exceeding a current consumption threshold by dividing the operation into a sequence of steps that do not exceed the threshold.
摘要翻译： 公开了一种用于阶段性强力密集型操作的方法和系统。 非易失性存储设备控制器检测电源复位。 控制器与非易失性存储设备中的非易失性存储器通信。 响应于检测到电源复位，控制器确定复位非易失性存储设备中的非易失性存储器所需的电流消耗。 当确定的电流消耗小于电流消耗阈值时，控制器同时复位所有非易失性存储器。 如果确定的电流消耗大于当前消耗阈值，则控制器复位多个非易失性存储器的第一子集，并且在预定延迟之后，复位非易失性存储器的第二子集。 因此，通过将操作划分成不超过阈值的一系列步骤，可以不超过电流消耗阈值来执行功率密集型操作。
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公开(公告)号：US08161231B2
公开(公告)日：2012-04-17
申请号：US13042043
申请日：2011-03-07
申请人： Steven S. Cheng
发明人： Steven S. Cheng
IPC分类号： G06F12/00
CPC分类号： G06F12/0646 , G06F2212/2022
摘要： A memory card has a data scrambler that performs a data scrambling operation on data stored in the memory card according to a device ID associated with the memory card. The device ID is either set at the factory and permanently stored in the card, or configurable by a user or a host system.
摘要翻译： 存储卡具有数据扰乱器，其根据与存储卡相关联的设备ID对存储在存储卡中的数据执行数据加扰操作。 设备ID可以在出厂设置并永久存储在卡中，或由用户或主机系统配置。
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