Maintaining Updates of Multi-Level Non-Volatile Memory in Binary Non-Volatile Memory
    3.
    发明申请
    Maintaining Updates of Multi-Level Non-Volatile Memory in Binary Non-Volatile Memory 审中-公开
    维持二进制非易失性存储器中多级非易失性存储器的更新

    公开(公告)号:US20110153912A1

    公开(公告)日:2011-06-23

    申请号:US12642584

    申请日:2009-12-18

    IPC分类号: G06F12/00 G06F12/02 G06F12/10

    摘要: A method of operating a memory system is presented. The memory system includes a controller and a non-volatile memory circuit, where the non-volatile memory circuit has a first portion, where data is stored in a binary format, and a second portion, where data is stored in a multi-state format. The controller manages the transfer of data to and from the memory system and the storage of data on the non-volatile memory circuit. The method includes receiving a first set of data and storing this first set of data in a first location in the second portion of the non-volatile memory circuit. The memory system subsequently receives updated data for a first subset of the first data set. The updated data is stored in a second location in the first portion of the non-volatile memory circuit, where the controller maintains a logical correspondence between the second location and the first subset of the first set of data.

    摘要翻译: 提出了一种操作存储系统的方法。 存储器系统包括控制器和非易失性存储器电路,其中非易失性存储器电路具有以二进制格式存储数据的第一部分和第二部分,其中数据以多状态格式存储 。 控制器管理到存储器系统和从存储器系统传送数据以及将数据存储在非易失性存储器电路上。 该方法包括接收第一组数据并将该第一组数据存储在非易失性存储器电路的第二部分中的第一位置。 存储器系统随后接收第一数据集的第一子集的更新数据。 更新的数据被存储在非易失性存储器电路的第一部分中的第二位置,其中控制器维持第一组数据的第二位置和第一子集之间的逻辑对应关系。

    Scheduling methods of phased garbage collection and housekeeping operations in a flash memory system
    5.
    发明授权
    Scheduling methods of phased garbage collection and housekeeping operations in a flash memory system 有权
    闪存系统中分阶段垃圾收集和家政操作的调度方法

    公开(公告)号:US08504784B2

    公开(公告)日:2013-08-06

    申请号:US11769033

    申请日:2007-06-27

    申请人: Shai Traister

    发明人: Shai Traister

    IPC分类号: G06F13/00

    摘要: An embodiment of a non-volatile memory storage system comprises a memory controller, and a flash memory module. The memory controller manages the storage operations of the flash memory module. The memory controller is configured to assign a priority level to one or more types of house keeping operations that may be higher than a priority level of one or more types of commands received by a host coupled to the storage system, and to service all operations required of the flash memory module according to priority.

    摘要翻译: 非易失性存储器存储系统的实施例包括存储器控制器和闪速存储器模块。 存储器控制器管理闪存模块的存储操作。 存储器控制器被配置为将优先级分配给可以高于由耦合到存储系统的主机接收的一种或多种类型的命令的优先级别的一种或多种类型的房屋保持操作,并且服务于所需的所有操作 的闪存模块。

    Pointers for write abort handling
    6.
    发明授权
    Pointers for write abort handling 有权
    写中止处理指针

    公开(公告)号:US08473923B2

    公开(公告)日:2013-06-25

    申请号:US12026472

    申请日:2008-02-05

    IPC分类号: G06F9/44 G06F11/00 G06F13/28

    摘要: A portion of a nonvolatile memory array that is likely to contain, partially programmed data may be identified from a high sensitivity read, by applying stricter than usual error correction code (ECC) requirements, or using pointers to programmed sectors. The last programmed data may be treated as likely to be partially programmed data. Data in the identified portion may be copied to another location, or left where it is with an indicator to prohibit further programming to the same cells. To avoid compromising previously stored data during subsequent programming, previously stored data may be backed up. Backing up may be done selectively, for example, only for nonsequential data, or only when the previously stored data contains an earlier version of data being programmed. If a backup copy already exists, another backup copy is not created. Sequential commands are treated as a single command if received within a predetermined time period.

    摘要翻译: 通过应用比通常的纠错码(ECC)要求更严格或使用指向编程扇区的指针,可以从高灵敏度读取来识别可能包含部分编程数据的非易失性存储器阵列的一部分。 最后编程的数据可能被视为可能是部分编程的数据。 所识别的部分中的数据可以被复制到另一个位置,或者与指示符一起保留在其中,以禁止进一步编程到相同的单元。 为了避免在随后的编程期间损害以前存储的数据,可以备份先前存储的数据。 可以有选择地进行备份,例如,仅针对非顺序数据,或仅当先前存储的数据包含正被编程的较早版本的数据时。 如果备份副本已经存在,则不会创建另一个备份副本。 如果在预定的时间段内被接收,则顺序命令被视为单个命令。

    Methods for conversion of update blocks based on association with host file management data structures
    7.
    发明授权
    Methods for conversion of update blocks based on association with host file management data structures 有权
    基于与主机文件管理数据结构的关联来转换更新块的方法

    公开(公告)号:US08341375B2

    公开(公告)日:2012-12-25

    申请号:US11725746

    申请日:2007-03-19

    IPC分类号: G06F13/00

    CPC分类号: G06F12/0246 G06F2212/7202

    摘要: A method for operating a memory system is provided. In this method, a sequential update block is provided and a write command is received to write data. The write command comprises a logical address associated with the data. If the logical address is associated with a host file management data structure, then the sequential update block is converted to a chaotic update block. After the conversion, the data are written to the chaotic update block.

    摘要翻译: 提供了一种用于操作存储器系统的方法。 在该方法中,提供顺序更新块,并且接收写入命令以写入数据。 写命令包括与数据相关联的逻辑地址。 如果逻辑地址与主机文件管理数据结构相关联,则将顺序更新块转换为混沌更新块。 转换后,将数据写入混沌更新块。

    URGENCY AND TIME WINDOW MANIPULATION TO ACCOMMODATE UNPREDICTABLE MEMORY OPERATIONS
    9.
    发明申请
    URGENCY AND TIME WINDOW MANIPULATION TO ACCOMMODATE UNPREDICTABLE MEMORY OPERATIONS 有权
    紧急和时间窗口操作来调节不可预测的存储器操作

    公开(公告)号:US20090044190A1

    公开(公告)日:2009-02-12

    申请号:US11864740

    申请日:2007-09-28

    IPC分类号: G06F9/46

    CPC分类号: G06F13/1689

    摘要: The variable latency associated with flash memory due to background data integrity operations is managed in order to allow the flash memory to be used in isochronous systems. A system processor is notified regularly of the nature and urgency of requests for time to ensure data integrity. Minimal interruptions of system processing are achieved and operation is ensured in the event of a power interruption.

    摘要翻译: 管理由于背景数据完整性操作而与闪存相关联的可变延迟,以便允许在同步系统中使用闪存。 系统处理器定期通知请求时间的性质和紧迫性,以确保数据的完整性。 实现系统处理的最小中断,并且在电源中断的情况下确保操作。

    Methods for conversion of update blocks based on comparison with a threshold size
    10.
    发明申请
    Methods for conversion of update blocks based on comparison with a threshold size 有权
    基于与阈值大小的比较来转换更新块的方法

    公开(公告)号:US20080235463A1

    公开(公告)日:2008-09-25

    申请号:US11725628

    申请日:2007-03-19

    申请人: Shai Traister

    发明人: Shai Traister

    IPC分类号: G06F12/06

    摘要: A method for operating a memory system is provided. In this method, a write command is received to write data following a previous write command. The write command and the previous write command have a discontinuity in logical addresses and the discontinuity in logical addresses defines a gap between a logical address of the write command and a logical address of the previous write command. Here, a sequential update block and preexisting data associated with the sequential update block are provided. The gap is compared with a threshold size and the data are written to the sequential update block if the gap is less than the threshold size.

    摘要翻译: 提供了一种用于操作存储器系统的方法。 在该方法中,接收写入命令以在先前写入命令之后写入数据。 写入命令和先前的写入命令在逻辑地址中具有不连续性,逻辑地址中的不连续性定义了写入命令的逻辑地址与先前写入命令的逻辑地址之间的间隙。 这里,提供顺序更新块和与顺序更新块相关联的预先存在的数据。 将间隙与阈值大小进行比较,并且如果间隙小于阈值大小,则将数据写入顺序更新块。