Thin film transistor substrate, liquid crystal display having same, and method of manufacturing the same
    1.
    发明授权
    Thin film transistor substrate, liquid crystal display having same, and method of manufacturing the same 有权
    薄膜晶体管基板,具有相同的液晶显示器及其制造方法

    公开(公告)号:US09484420B2

    公开(公告)日:2016-11-01

    申请号:US13544751

    申请日:2012-07-09

    摘要: A display apparatus includes a thin film transistor substrate, a substrate facing the thin film transistor substrate, and a liquid crystal layer. The thin film transistor substrate includes an insulating substrate, a gate electrode disposed on a surface of the insulating substrate, a gate insulating layer covering the gate electrode, a semiconductor layer disposed on the gate insulating layer, a source electrode disposed on the semiconductor layer, and a drain electrode disposed on the semiconductor layer and spaced apart from the source electrode. One of the source electrode and the drain electrode is spaced apart from the gate electrode in a plan view. The gate electrode includes a side surface inclined with respect to the surface of the insulating substrate and is partially overlapped with a portion of the source electrode or the drain electrode in a direction perpendicular to the side surface of the gate electrode.

    摘要翻译: 显示装置包括薄膜晶体管基板,面向薄膜晶体管基板的基板和液晶层。 薄膜晶体管基板包括绝缘基板,设置在绝缘基板的表面上的栅极电极,覆盖栅电极的栅极绝缘层,设置在栅极绝缘层上的半导体层,设置在半导体层上的源电极, 以及设置在半导体层上并与源电极间隔开的漏电极。 在平面图中,源电极和漏极之一与栅电极间隔开。 栅极包括相对于绝缘基板的表面倾斜的侧表面,并且在与栅电极的侧表面垂直的方向上与源电极或漏电极的一部分重叠。

    THIN FILM TRANSISTOR SUBSTRATE, LIQUID CRYSTAL DISPLAY HAVING SAME, AND METHOD OF MANUFACTURING THE SAME
    2.
    发明申请
    THIN FILM TRANSISTOR SUBSTRATE, LIQUID CRYSTAL DISPLAY HAVING SAME, AND METHOD OF MANUFACTURING THE SAME 有权
    薄膜晶体管基板,具有相同的液晶显示器及其制造方法

    公开(公告)号:US20130027627A1

    公开(公告)日:2013-01-31

    申请号:US13544751

    申请日:2012-07-09

    摘要: A display apparatus includes a thin film transistor substrate, a substrate facing the thin film transistor substrate, and a liquid crystal layer. The thin film transistor substrate includes an insulating substrate, a gate electrode disposed on a surface of the insulating substrate, a gate insulating layer covering the gate electrode, a semiconductor layer disposed on the gate insulating layer, a source electrode disposed on the semiconductor layer, and a drain electrode disposed on the semiconductor layer and spaced apart from the source electrode. One of the source electrode and the drain electrode is spaced apart from the gate electrode in a plan view. The gate electrode includes a side surface inclined with respect to the surface of the insulating substrate and is partially overlapped with a portion of the source electrode or the drain electrode in a direction perpendicular to the side surface of the gate electrode.

    摘要翻译: 显示装置包括薄膜晶体管基板,面向薄膜晶体管基板的基板和液晶层。 薄膜晶体管基板包括绝缘基板,设置在绝缘基板的表面上的栅极电极,覆盖栅电极的栅极绝缘层,设置在栅极绝缘层上的半导体层,设置在半导体层上的源电极, 以及设置在半导体层上并与源电极间隔开的漏电极。 在平面图中,源电极和漏极之一与栅电极间隔开。 栅极包括相对于绝缘基板的表面倾斜的侧表面,并且在与栅电极的侧表面垂直的方向上与源电极或漏电极的一部分重叠。

    Method for hiding receiver's address for link layer in group communication

    公开(公告)号:US10044680B2

    公开(公告)日:2018-08-07

    申请号:US15137051

    申请日:2016-04-25

    IPC分类号: H04L29/06 G06F21/62

    摘要: The present invention relates to a receiver information hiding method of hiding receiver information of a message in a system including a transmitting terminal broadcasting the message and a multitude of receiving terminals receiving the message, and the method includes selecting by the transmitting terminal at least one receiving terminal that has to process the message from the plurality of terminals, transforming by the transmitting terminal address information regarding the selected at least one receiving terminal, generating by the transmitting terminal the message using the transformed address information and broadcasting the generated message, and determining by each of the plurality of receiving terminals whether or not the corresponding receiving terminal is included in the selected at least one receiving terminal using specific address information corresponding to each of the plurality of receiving terminals and the transformed address information, in response to the reception of the message, and selectively processing or ignoring the message according to the determination result.

    System and method for selecting research and development project through autonomous proposals of evaluation indicators

    公开(公告)号:US11068816B2

    公开(公告)日:2021-07-20

    申请号:US15772807

    申请日:2016-12-30

    申请人: Sangho Park

    发明人: Sangho Park

    IPC分类号: G06Q10/06 G06Q30/08 G06F16/00

    摘要: The present invention relates to a system and a method for selecting a research and development project through autonomous proposals of evaluation indicators, in which performance information generated according to a selection of performance evaluation items for research and development project bidding is classified by bidders, and the research and development project is selected for each classified bidder group. The present invention allows research and development project bidders to select evaluation indicators which serve as criteria for selecting a research and development project, thereby being capable of guaranteeing autonomy and providing fair bidding opportunities to all research and development project bidders. Also, since a research and development project is selected for each group classified according to the autonomously selected performance evaluation items, transparent selection and fair competition between the research and development project bidders can be ensured, and research and development projects can be equally divided.

    Method for circuit simulation
    7.
    发明授权
    Method for circuit simulation 有权
    电路仿真方法

    公开(公告)号:US08856719B2

    公开(公告)日:2014-10-07

    申请号:US13616511

    申请日:2012-09-14

    IPC分类号: G06F11/22 G06F17/50

    CPC分类号: G06F17/5036

    摘要: A circuit simulation method for checking a circuit error is disclosed. The method may include generating a netlist with respect to a designed circuit, simulating an operation of the designed circuit using the generated netlist, and checking an error of the designed circuit using the generated netlist and using a waveform generated when performing the simulation.

    摘要翻译: 公开了一种用于检查电路错误的电路仿真方法。 该方法可以包括相对于设计的电路生成网表,使用所生成的网表模拟所设计的电路的操作,以及使用所生成的网表来检查所设计的电路的错误,并使用在执行仿真时产生的波形。