Method and system for controlling deformable micromirror devices
    1.
    发明授权
    Method and system for controlling deformable micromirror devices 有权
    用于控制可变形微镜器件的方法和系统

    公开(公告)号:US08446349B2

    公开(公告)日:2013-05-21

    申请号:US11945592

    申请日:2007-11-27

    IPC分类号: G09G3/34

    摘要: A method and system for controlling deformable micromirror devices are provided. In accordance with one embodiment of the present disclosure, a display system includes multiple deformable micromirror devices, a buffer, and a controller. Each deformable micromirror device includes a plurality of micromirrors. The buffer is communicatively coupled, at a first interface speed, to each deformable micromirror device. The buffer is operable to communicate in parallel with the deformable micromirror devices. The controller is communicatively coupled, at a second interface speed, to the buffer. The controller is operable to receive a display input and, in response, generate a plurality signals each corresponding to an optical characteristic of the display input. The controller is further operable to sequentially communicate each of the plurality of signals through the buffer to a corresponding one of the deformable micromirror devices. Each deformable micromirror device receives at least a subset of the plurality of signals.

    摘要翻译: 提供了一种用于控制可变形微镜器件的方法和系统。 根据本公开的一个实施例,显示系统包括多个可变形微镜器件,缓冲器和控制器。 每个可变形微镜装置包括多个微镜。 缓冲器以第一接口速度与每个可变形微镜器件通信耦合。 缓冲器可操作以与可变形微镜器件并行通信。 控制器以第二接口速度通信耦合到缓冲器。 控制器可操作以接收显示输入,并且响应地产生每个对应于显示输入的光学特性的多个信号。 所述控制器还可操作以将所述多个信号中的每一个通过所述缓冲器顺序传送到所述可变形微镜器件中的对应的一个。 每个可变形微镜装置接收多个信号的至少一个子集。

    Method and System for Controlling Deformable Micromirror Devices
    2.
    发明申请
    Method and System for Controlling Deformable Micromirror Devices 有权
    用于控制可变形微镜器件的方法和系统

    公开(公告)号:US20090135314A1

    公开(公告)日:2009-05-28

    申请号:US11945592

    申请日:2007-11-27

    IPC分类号: H04N5/74

    摘要: A method and system for controlling deformable micromirror devices are provided. In accordance with one embodiment of the present disclosure, a display system includes multiple deformable micromirror devices, a buffer, and a controller. Each deformable micromirror device includes a plurality of micromirrors. The buffer is communicatively coupled, at a first interface speed, to each deformable micromirror device. The buffer is operable to communicate in parallel with the deformable micromirror devices. The controller is communicatively coupled, at a second interface speed, to the buffer. The controller is operable to receive a display input and, in response, generate a plurality signals each corresponding to an optical characteristic of the display input. The controller is further operable to sequentially communicate each of the plurality of signals through the buffer to a corresponding one of the deformable micromirror devices. Each deformable micromirror device receives at least a subset of the plurality of signals.

    摘要翻译: 提供了一种用于控制可变形微镜器件的方法和系统。 根据本公开的一个实施例,显示系统包括多个可变形微镜器件,缓冲器和控制器。 每个可变形微镜装置包括多个微镜。 缓冲器以第一接口速度与每个可变形微镜器件通信耦合。 缓冲器可操作以与可变形微镜器件并行通信。 控制器以第二接口速度通信耦合到缓冲器。 控制器可操作以接收显示输入,并且响应地产生每个对应于显示输入的光学特性的多个信号。 所述控制器还可操作以将所述多个信号中的每一个通过所述缓冲器顺序传送到所述可变形微镜器件中的对应的一个。 每个可变形微镜装置接收多个信号的至少一个子集。

    Apparatus and method for increasing compensation sequence storage density in a projection visual display system
    3.
    发明授权
    Apparatus and method for increasing compensation sequence storage density in a projection visual display system 有权
    在投影视觉显示系统中增加补偿顺序存储密度的装置和方法

    公开(公告)号:US08614723B2

    公开(公告)日:2013-12-24

    申请号:US11614105

    申请日:2006-12-21

    IPC分类号: G06F3/038 H04N5/64 G09G5/10

    CPC分类号: G03B21/26

    摘要: An apparatus for, and method of, increasing compensation sequence storage density in a projection visual display system and a projection visual display system incorporating the apparatus or the method. In one embodiment, the apparatus includes: (1) a memory containing a first compensation sequence portion that is common to a plurality of effective transmission factors and a plurality of second compensation sequence portions that are unique to a corresponding plurality of effective transmission factors and (2) a compensation sequence generator coupled to the memory and configured to construct a compensation sequence for use in the projection visual display system using the first compensation sequence portion and one of the plurality of second compensation sequence portions selected as a function of a particular effective transmission factor.

    摘要翻译: 一种用于增加投影视觉显示系统中的补偿顺序存储密度的装置和方法,以及包含该装置或方法的投影视觉显示系统。 在一个实施例中,该装置包括:(1)存储器,其包含多个有效传输因子共有的第一补偿序列部分和对应的多个有效传输因子是唯一的多个第二补偿序列部分,和 2)补偿序列发生器,其耦合到所述存储器并且被配置为构建使用所述投影视觉显示系统中的补偿序列,所述补偿序列部分使用所述第一补偿序列部分和作为特定有效传输的函数选择的所述多个第二补偿序列部分中的一个 因子。

    Apparatus and Method for Increasing Compensation Sequence Storage Density in a Projection Visual Display System
    4.
    发明申请
    Apparatus and Method for Increasing Compensation Sequence Storage Density in a Projection Visual Display System 有权
    用于增加投影视觉显示系统中的补偿顺序存储密度的装置和方法

    公开(公告)号:US20080151195A1

    公开(公告)日:2008-06-26

    申请号:US11614105

    申请日:2006-12-21

    IPC分类号: G03B21/26

    CPC分类号: G03B21/26

    摘要: An apparatus for, and method of, increasing compensation sequence storage density in a projection visual display system and a projection visual display system incorporating the apparatus or the method. In one embodiment, the apparatus includes: (1) a memory containing a first compensation sequence portion that is common to a plurality of effective transmission factors and a plurality of second compensation sequence portions that are unique to a corresponding plurality of effective transmission factors and (2) a compensation sequence generator coupled to the memory and configured to construct a compensation sequence for use in the projection visual display system using the first compensation sequence portion and one of the plurality of second compensation sequence portions selected as a function of a particular effective transmission factor.

    摘要翻译: 一种用于增加投影视觉显示系统中的补偿顺序存储密度的装置和方法,以及包含该装置或方法的投影视觉显示系统。 在一个实施例中,该装置包括:(1)存储器,其包含多个有效传输因子共有的第一补偿序列部分和对应的多个有效传输因子是唯一的多个第二补偿序列部分,和 2)补偿序列发生器,其耦合到所述存储器并且被配置为构建使用所述投影视觉显示系统中的补偿序列,所述补偿序列部分使用所述第一补偿序列部分和作为特定有效传输的函数选择的所述多个第二补偿序列部分中的一个 因子。

    System and method for color-specific sequence scaling for sequential color systems
    5.
    发明申请
    System and method for color-specific sequence scaling for sequential color systems 有权
    用于顺序色彩系统的颜色特定序列缩放的系统和方法

    公开(公告)号:US20080084369A1

    公开(公告)日:2008-04-10

    申请号:US11545436

    申请日:2006-10-10

    IPC分类号: G09G3/34

    摘要: System and method for adjusting the color segment durations for colors in a color sequence in sequential color display systems. A preferred embodiment comprises receiving a desired color sequence to display, computing a scaling factor for each color in the desired color sequence based on a reference color sequence, and sequentially displaying the colors in the desired color sequence. The reference color sequence used in computing the scaling factors specifies a duration for each color in the reference color sequence, while the desired color sequence specifies a desired duration for each color in the desired color sequence. The use of a single reference color sequence to create a large number of color sequences can save a significant amount of storage space and can allow for the storage of reference color sequences to meet varying chromatic properties due to changes in the display system, user settings, and operating environment.

    摘要翻译: 用于在顺序彩色显示系统中调整颜色序列中的颜色的颜色段持续时间的系统和方法。 优选实施例包括接收所需的颜色序列以显示,基于参考颜色序列计算所需颜色序列中的每种颜色的缩放因子,并且以期望的颜色序列顺序显示颜色。 用于计算缩放因子的参考颜色序列指定参考颜色序列中每种颜色的持续时间,而所需颜色序列指定所需颜色序列中每种颜色的期望持续时间。 使用单个参考颜色序列来创建大量的颜色序列可以节省大量的存储空间,并且可以允许参考颜色序列的存储以满足由于显示系统的变化,用户设置, 和操作环境。

    System and method for color-specific sequence scaling for sequential color systems
    6.
    发明授权
    System and method for color-specific sequence scaling for sequential color systems 有权
    用于顺序色彩系统的颜色特定序列缩放的系统和方法

    公开(公告)号:US08493288B2

    公开(公告)日:2013-07-23

    申请号:US11545436

    申请日:2006-10-10

    IPC分类号: G09G3/00 G09G3/36

    摘要: System and method for adjusting the color segment durations for colors in a color sequence in sequential color display systems. A preferred embodiment comprises receiving a desired color sequence to display, computing a scaling factor for each color in the desired color sequence based on a reference color sequence, and sequentially displaying the colors in the desired color sequence. The reference color sequence used in computing the scaling factors specifies a duration for each color in the reference color sequence, while the desired color sequence specifies a desired duration for each color in the desired color sequence. The use of a single reference color sequence to create a large number of color sequences can save a significant amount of storage space and can allow for the storage of reference color sequences to meet varying chromatic properties due to changes in the display system, user settings, and operating environment.

    摘要翻译: 用于在顺序彩色显示系统中调整颜色序列中的颜色的颜色段持续时间的系统和方法。 优选实施例包括接收所需的颜色序列以显示,基于参考颜色序列计算所需颜色序列中的每种颜色的缩放因子,并且以期望的颜色序列顺序显示颜色。 用于计算缩放因子的参考颜色序列指定参考颜色序列中每种颜色的持续时间,而所需颜色序列指定所需颜色序列中每种颜色的期望持续时间。 使用单个参考颜色序列来创建大量的颜色序列可以节省大量的存储空间,并且可以允许参考颜色序列的存储以满足由于显示系统的变化,用户设置, 和操作环境。

    Method and apparatus for analog graphics sample clock frequency offset detection and verification
    7.
    发明授权
    Method and apparatus for analog graphics sample clock frequency offset detection and verification 有权
    用于模拟图形采样时钟频偏检测和验证的方法和装置

    公开(公告)号:US07825990B2

    公开(公告)日:2010-11-02

    申请号:US11355815

    申请日:2006-02-16

    IPC分类号: H03M1/12

    摘要: A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A circuit corrects the clock frequency using a period of a columnar frame differences as a function of columnar location. The sampling clock frequency is changed by an amount dependent on the period of the columnar differences. A second measure of the difference between successive frames is computed for a sequence of clock phases. The frequency of the clock is verified using a characteristic of the second measure. The characteristic can be the ratio of the maximum to the minimum of the second measure over selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.

    摘要翻译: 一种用于模数 - 数字视频信号转换器的方法和装置。 转换器由具有可控频率和相位的时钟控制,用于对模拟信号进行采样。 电路使用柱状帧差的周期作为柱状位置的函数来校正时钟频率。 采样时钟频率的变化取决于柱状差的周期。 对于时钟相位序列计算连续帧之间的差的第二个度量。 使用第二个测量的特性来验证时钟的频率。 特性可以是所选时钟相位上的第二个测量的最大值与最小值的比值。 可以使用其他特征,例如最大和最小测量的差。

    Method and apparatus for analog graphics sample clock frequency offset detection and verification
    8.
    发明授权
    Method and apparatus for analog graphics sample clock frequency offset detection and verification 有权
    用于模拟图形采样时钟频偏检测和验证的方法和装置

    公开(公告)号:US08111330B2

    公开(公告)日:2012-02-07

    申请号:US12917685

    申请日:2010-11-02

    IPC分类号: H03M1/12 H04N5/21

    摘要: A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A circuit corrects the clock frequency using a period of a columnar frame differences as a function of columnar location. The sampling clock frequency is changed by an amount dependent on the period of the columnar differences. A second measure of the difference between successive frames is computed for a sequence of clock phases. The frequency of the clock is verified using a characteristic of the second measure. The characteristic can be the ratio of the maximum to the minimum of the second measure over selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.

    摘要翻译: 一种用于模数 - 数字视频信号转换器的方法和装置。 转换器由具有可控频率和相位的时钟控制,用于对模拟信号进行采样。 电路使用柱状帧差的周期作为柱状位置的函数来校正时钟频率。 采样时钟频率的变化取决于柱状差的周期。 对于时钟相位序列计算连续帧之间的差的第二个度量。 使用第二个测量的特性来验证时钟的频率。 特性可以是所选时钟相位上的第二个测量的最大值与最小值的比值。 可以使用其他特征,例如最大和最小测量的差。

    Method and Apparatus for Analog Graphics Sample Clock Frequency Offset Detection and Verification
    9.
    发明申请
    Method and Apparatus for Analog Graphics Sample Clock Frequency Offset Detection and Verification 有权
    模拟图形采样时钟频率偏移检测和验证的方法和装置

    公开(公告)号:US20110043700A1

    公开(公告)日:2011-02-24

    申请号:US12917685

    申请日:2010-11-02

    IPC分类号: H03M1/12

    摘要: A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A circuit corrects the clock frequency using a period of a columnar frame differences as a function of columnar location. The sampling clock frequency is changed by an amount dependent on the period of the columnar differences. A second measure of the difference between successive frames is computed for a sequence of clock phases. The frequency of the clock is verified using a characteristic of the second measure. The characteristic can be the ratio of the maximum to the minimum of the second measure over selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.

    摘要翻译: 一种用于模数 - 数字视频信号转换器的方法和装置。 转换器由具有可控频率和相位的时钟控制,用于对模拟信号进行采样。 电路使用柱状帧差的周期作为柱状位置的函数来校正时钟频率。 采样时钟频率的变化取决于柱状差的周期。 对于时钟相位序列计算连续帧之间的差的第二个度量。 使用第二个测量的特性来验证时钟的频率。 特性可以是所选时钟相位上的第二个测量的最大值与最小值的比值。 可以使用其他特征,例如最大和最小测量的差。

    Method and apparatus for analog graphics sample clock frequency verification
    10.
    发明授权
    Method and apparatus for analog graphics sample clock frequency verification 有权
    模拟图形采样时钟频率验证方法和装置

    公开(公告)号:US07733424B2

    公开(公告)日:2010-06-08

    申请号:US11355789

    申请日:2006-02-16

    IPC分类号: H03M1/12

    CPC分类号: H03M1/08 G09G5/008 H03M1/12

    摘要: A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A measure of the difference between successive frames of the image is computed for a sequence of clock phases. The measure can be a count taken over pixels of the magnitude of the difference between a pixel in one frame and the corresponding pixel in a following frame exceeding a threshold value. The frequency of the clock is verified using a characteristic of the frame difference. The characteristic can be the ratio of the maximum measure to the minimum measure over the selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.

    摘要翻译: 一种用于模数 - 数字视频信号转换器的方法和装置。 转换器由具有可控频率和相位的时钟控制,用于对模拟信号进行采样。 对于时钟相位序列计算图像的连续帧之间的差异的度量。 该测量可以是对一帧中的像素与超过阈值的后续帧中的对应像素之间的差值的大小的像素进行的计数。 使用帧差的特性来验证时钟的频率。 特性可以是所选时钟相位上的最大测量与最小测量的比率。 可以使用其他特征,例如最大和最小测量的差。