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公开(公告)号：US07042299B2
公开(公告)日：2006-05-09
申请号：US11099517
申请日：2005-04-06
CPC分类号： H03B5/364
摘要： A crystal oscillation circuit has a reduced circuit area and enables to stably oscillate at low consumed current. The crystal oscillation circuit includes an oscillating amplifier and a constant voltage generator. The oscillating amplifier excites a resonator composed of a resistor, a crystal oscillator and a capacitor. The constant voltage generator includes a one-stage differential circuit composed of a transistor and a capacitor for suppressing transient fluctuation of a constant voltage Vreg for generating the constant voltage Vreg served as a supply voltage for the oscillating amplifier. By generating the constant voltage Vreg through the one-stage differential circuit, the phase lag of the constant voltage Vreg reaches 90 degrees at most. This eliminates the necessity of a phase compensation capacitor, resulting in making the circuit area smaller and realizing the stable oscillation at low consumed current.
摘要翻译： 晶体振荡电路具有减小的电路面积，能够在低消耗电流下稳定地振荡。 晶体振荡电路包括振荡放大器和恒压发生器。 振荡放大器激发由电阻器，晶体振荡器和电容器组成的谐振器。 恒定电压发生器包括由晶体管和电容器组成的一级差分电路，用于抑制用作产生用于振荡放大器的电源电压的恒定电压Vreg的恒定电压Vreg的瞬变波动。 通过产生通过一级差分电路的恒定电压Vreg，恒定电压Vreg的相位滞后最多达到90度。 这消除了相位补偿电容器的必要性，导致电路面积更小并且在低消耗电流下实现稳定的振荡。
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公开(公告)号：US20050174183A1
公开(公告)日：2005-08-11
申请号：US11099517
申请日：2005-04-06
CPC分类号： H03B5/364
摘要： A crystal oscillation circuit has a reduced circuit area and enables to stably oscillate at low consumed current. The crystal oscillation circuit includes an oscillating amplifier and a constant voltage generator. The oscillating amplifier excites a resonator composed of a resistor, a crystal oscillator and a capacitor. The constant voltage generator includes a one-stage differential circuit composed of a transistor and a capacitor for suppressing transient fluctuation of a constant voltage Vreg for generating the constant voltage Vreg served as a supply voltage for the oscillating amplifier. By generating the constant voltage Vreg through the one-stage differential circuit, the phase lag of the constant voltage Vreg reaches 90 degrees at most. This eliminates the necessity of a phase compensation capacitor, resulting in making the circuit area smaller and realizing the stable oscillation at low consumed current.
摘要翻译： 晶体振荡电路具有减小的电路面积，能够在低消耗电流下稳定地振荡。 晶体振荡电路包括振荡放大器和恒压发生器。 振荡放大器激发由电阻器，晶体振荡器和电容器组成的谐振器。 恒定电压发生器包括由晶体管和电容器组成的一级差分电路，用于抑制用作产生用于振荡放大器的电源电压的恒定电压Vreg的恒定电压Vreg的瞬变波动。 通过产生通过一级差分电路的恒定电压Vreg，恒定电压Vreg的相位滞后最多达到90度。 这消除了相位补偿电容器的必要性，导致电路面积更小并且在低消耗电流下实现稳定的振荡。
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公开(公告)号：US07196379B2
公开(公告)日：2007-03-27
申请号：US10965856
申请日：2004-10-18
IPC分类号： H01L29/78 , H01L21/8238
CPC分类号： H01L27/0811
摘要： A semiconductor device in which a dielectric breakdown of a gate oxide in a MOS capacitor can be prevented and in which a circuit area can be reduced. The semiconductor device comprises an NMOS transistor a gate of which is connected to a terminal VDD on a high potential side and a PMOS transistor a gate of which is connected to a terminal GND on a low potential side, source/drain (S/D) regions of the NMOS transistor and source/drain (S/D) regions of the PMOS transistor being electrically connected.
摘要翻译： 可以防止MOS电容器中的栅极氧化物的电介质击穿并且可以减小电路面积的半导体器件。 半导体器件包括NMOS晶体管，栅极连接到高电位侧的端子VDD和PMOS晶体管，其栅极连接到低电位侧的端子GND，源极/漏极（S / D） NMOS晶体管的区域和PMOS晶体管的源极/漏极（S / D）区域电连接。
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公开(公告)号：US20050280084A1
公开(公告)日：2005-12-22
申请号：US10965856
申请日：2004-10-18
CPC分类号： H01L27/0811
摘要： A semiconductor device in which a dielectric breakdown of a gate oxide in a MOS capacitor can be prevented and in which a circuit area can be reduced. The semiconductor device comprises an NMOS transistor a gate of which is connected to a terminal VDD on a high potential side and a PMOS transistor a gate of which is connected to a terminal GND on a low potential side, source/drain (S/D) regions of the NMOS transistor and source/drain (S/D) regions of the PMOS transistor being electrically connected.
摘要翻译： 可以防止MOS电容器中的栅极氧化物的电介质击穿并且可以减小电路面积的半导体器件。 半导体器件包括NMOS晶体管，栅极连接到高电位侧的端子VDD和PMOS晶体管，其栅极连接到低电位侧的端子GND，源极/漏极（S / D） NMOS晶体管的区域和PMOS晶体管的源极/漏极（S / D）区域电连接。
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公开(公告)号：US07429900B2
公开(公告)日：2008-09-30
申请号：US11238954
申请日：2005-09-30
IPC分类号： H03B5/32
CPC分类号： H03B5/32 , H03K3/0307
摘要： An object is not only to contribute to reduction in current consumption but also to advance actuation of a system required in a camera, an on-vehicle electric component, etc. by shortening a waiting time for stabilization of oscillation. An oscillator having an inverting amplifier inverting and amplifying an input signal and outputting it, a resonator connected to between an input and an output terminals of the inverting amplifier, a feedback resistance connected in parallel to the resonator, and an output circuit outputting a first clock signal based on a signal of an on-load parallel resonance frequency or a parallel resonance frequency oscillated by the resonator, the inverting amplifier and the feedback resistance to a function block is provided.
摘要翻译： 目的不仅在于减少电流消耗，而且通过缩短振荡的稳定等待时间来提高照相机，车载电气部件等所需的系统的动作。 一种具有反相放大器的反相放大器，其反相并放大输入信号并输出;振荡器，连接到反相放大器的输入端和输出端之间，与谐振器并联连接的反馈电阻，以及输出电路，输出第一时钟 基于谐振器振荡的负载并联谐振频率或并联谐振频率的信号，提供反相放大器和对功能块的反馈电阻的信号。
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公开(公告)号：US20060071725A1
公开(公告)日：2006-04-06
申请号：US11238954
申请日：2005-09-30
IPC分类号： H03B1/00
CPC分类号： H03B5/32 , H03K3/0307
摘要： An object is not only to contribute to reduction in current consumption but also to advance actuation of a system required in a camera, an on-vehicle electric component, etc. by shortening a waiting time for stabilization of oscillation. An oscillator having an inverting amplifier inverting and amplifying an input signal and outputting it, a resonator connected to between an input and an output terminals of the inverting amplifier, a feedback resistance connected in parallel to the resonator, and an output circuit outputting a first clock signal based on a signal of an on-load parallel resonance frequency or a parallel resonance frequency oscillated by the resonator, the inverting amplifier and the feedback resistance to a function block is provided.
摘要翻译： 目的不仅在于减少电流消耗，而且通过缩短振荡的稳定等待时间来提高照相机，车载电气部件等所需的系统的动作。 一种具有反相放大器的反相放大器，其反相并放大输入信号并输出;振荡器，连接到反相放大器的输入端和输出端之间，与谐振器并联连接的反馈电阻，以及输出电路，输出第一时钟 基于谐振器振荡的负载并联谐振频率或并联谐振频率的信号，提供反相放大器和对功能块的反馈电阻的信号。
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7.发明申请Semiconductor device, designing device, layout designing method, program and storage medium 审中-公开半导体器件，设计器件，布局设计方法，程序和存储介质公开(公告)号：US20060053399A1
公开(公告)日：2006-03-09
申请号：US11014843
申请日：2004-12-20
申请人： Hiroyuki Honda , Toshio Arakawa , Hiroshi Mawatari , Norito Hibino , Kouji Arai , Keigo Tada , Fukuji Kihara
发明人： Hiroyuki Honda , Toshio Arakawa , Hiroshi Mawatari , Norito Hibino , Kouji Arai , Keigo Tada , Fukuji Kihara
CPC分类号： G06F17/5068
摘要： A designing device for designing a layout of a semiconductor device includes a layout position candidate extracting unit for obtaining layout position candidates of a regulator, a tentatively wiring unit for tentatively arranging the regulator at the layout position candidates and tentatively laying out a power line, and a regulator layout position deciding unit for deciding a position of a tentative layout at which an area of the power line that is tentatively laid out is the smallest as the layout position of the regulator.
摘要翻译： 用于设计半导体器件的布局的设计装置包括：布局位置候选提取单元，用于获得调节器的布局位置候选;暂时布线单元，用于暂时地将调节器布置在布局位置候选位置并暂时布置电力线;以及 调节器布置位置决定单元，用于决定暂时布置的电力线的区域最小的暂定布局的位置作为调节器的布局位置。
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8.发明授权公开(公告)号：US06781413B2
公开(公告)日：2004-08-24
申请号：US10270649
申请日：2002-10-16
申请人： Fukuji Kihara , Yuki Kaneko
发明人： Fukuji Kihara , Yuki Kaneko
IPC分类号： H03K190175
CPC分类号： H03K3/356008 , H03K3/356113 , H03K3/356165
摘要： A level conversion circuit for converting a first signal at a lower power source side into a second signal at a higher power source side, which is higher than the lower power source, includes first and second transistors provided at a ground side and controlled by the first signal and an inverted signal there of; third and fourth transistors gates and drains of which are cross-connected, provided at the higher power source side and connected to the first and second transistors respectively; and an initialization circuit for, at a higher power voltage rise time, reducing (or raising), along a current path, a level of either a first node located between the first and third transistors, or a second node located between the second and fourth transistors, to a ground voltage (or to a voltage of the higher power source).
摘要翻译： 用于将较低电源侧的第一信号转换为高于下电源的较高电源侧的第二信号的电平转换电路包括设置在地侧并由第一和第二电源控制的第一和第二晶体管 信号和反相信号; 第三和第四晶体管的栅极和漏极交叉连接，分别设置在较高的电源侧并连接到第一和第二晶体管; 以及用于在较高功率电压上升时间沿着电流路径减小（或升高）位于第一和第三晶体管之间的第一节点或位于第二和第四晶体管之间的第二节点的电平的初始化电路 晶体管，接地电压（或较高电源的电压）。
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