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公开(公告)号：US20230421140A1
公开(公告)日：2023-12-28
申请号：US18331495
申请日：2023-06-08
申请人： ROHM CO., LTD.
发明人： Hisashi SUGIE
IPC分类号： H03K3/03 , H03K19/0185 , H03K3/011
CPC分类号： H03K3/0307 , H03K19/018521 , H03K3/011
摘要： A first current source charges a capacitor. A second current source supplies a current to an input node of an inverter. A current mirror circuit has its output node coupled to an input node of the inverter. A resistor is coupled between the input node of the current mirror circuit and the capacitor.
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2.发明授权公开(公告)号：US09735792B2
公开(公告)日：2017-08-15
申请号：US14651571
申请日：2014-01-03
申请人： Rambus Inc.
发明人： Jared L. Zerbe , Masum Hossain
CPC分类号： H03L7/24 , H03K3/0307 , H03K3/0315 , H03L1/00 , H03L7/06
摘要： Embodiments of an integrated circuit (IC) comprising circuitry to determine settings for an injection-locked oscillator (ILO) are described. In some embodiments, an injection signal is generated based on a first clock edge of a reference clock signal, and is injected into an ILO. Next, one or more output signals of the ILO are sampled based on a second clock edge of the reference clock signal, and settings for the ILO are determined based on the samples. In some embodiments, a sequence of two or more time-to-digital (TDC) codes is generated based on a reference clock signal and a free-running ILO. In some embodiments, the TDC circuitry that is already present in a delay-locked loop is reused for determining the sequence of two or more TDC codes. The ILO settings can then be determined based on the sequence of two or more TDC codes.
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公开(公告)号：US09246435B1
公开(公告)日：2016-01-26
申请号：US14617716
申请日：2015-02-09
发明人： Amirpouya Kavousian , Yashar Rajavi , Alireza Khalili , Mohammad Bagher Vahid Far , Abbas Komijani
CPC分类号： H03B5/06 , H03B5/362 , H03B5/364 , H03B5/366 , H03B2200/0094 , H03K3/014 , H03K3/0307 , H03K3/0315 , H03L3/00 , H03L7/00
摘要： A method and apparatus for charging a crystal oscillator are provided. A voltage generating module outputs a ramp voltage signal to a ring oscillator. The ring oscillator generates and outputs a waveform based on the ramp voltage signal. The ramp voltage signal facilitates the ring oscillator to output the waveform at a frequency that varies with time, wherein the varying frequency is within a frequency range of the crystal oscillator. An inverter generates a digital input signal based on the waveform. The digital input signal is sent to an input of the crystal oscillator for charging the crystal oscillator. A feedback module outputs a feedback signal based on the digital input signal, wherein the feedback signal controls the voltage generating module to generate a fixed voltage signal that facilitates the ring oscillator to output the waveform at a frequency that is equal to a resonance frequency of the crystal oscillator.
摘要翻译： 提供了一种用于对晶体振荡器充电的方法和装置。 电压产生模块向环形振荡器输出斜坡电压信号。 环形振荡器产生并输出基于斜坡电压信号的波形。 斜坡电压信号有助于环形振荡器以随时间变化的频率输出波形，其中变化的频率在晶体振荡器的频率范围内。 逆变器根据波形产生数字输入信号。 数字输入信号被发送到晶体振荡器的输入端，用于对晶体振荡器充电。 反馈模块基于数字输入信号输出反馈信号，其中反馈信号控制电压产生模块以产生固定电压信号，其有助于环形振荡器以等于的频率的频率输出波形 晶体振荡器。
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公开(公告)号：US20140118076A1
公开(公告)日：2014-05-01
申请号：US14061605
申请日：2013-10-23
发明人： Tomoki Yasukawa
IPC分类号： H03L7/00
CPC分类号： H03L7/181 , H03K3/0307 , H03K5/135 , H03L7/00
摘要： A frequency error calculator circuit calculates the frequency error in a basic clock based on the basic clock and on a reference clock having a frequency higher than the basic clock. An operation clock generator circuit outputs an operation clock whose error has been corrected based on the frequency error calculated by the frequency error calculator circuit. An ON/OFF control circuit outputs an ON/OFF control signal that specifies the calculation timing that the frequency error calculator circuit calculates the frequency error of the basic clock based on the frequency error calculated by the frequency error calculator circuit.
摘要翻译： 频率误差计算器电路基于基本时钟和具有高于基本时钟的频率的参考时钟来计算基本时钟中的频率误差。 操作时钟发生器电路根据由频率误差计算电路计算的频率误差输出其误差已被校正的操作时钟。 ON / OFF控制电路输出指定频率误差计算电路基于由频率误差计算电路计算的频率误差来计算基本时钟的频率误差的计算定时的ON / OFF控制信号。
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公开(公告)号：US08487709B2
公开(公告)日：2013-07-16
申请号：US13122694
申请日：2010-07-22
申请人： Shinji Ishikawa , Ichiro Yamane
发明人： Shinji Ishikawa , Ichiro Yamane
IPC分类号： H03B5/32
CPC分类号： H03B5/36 , H03B5/06 , H03B2200/0046 , H03B2200/0094 , H03K3/0307 , H03L3/00
摘要： An oscillator circuit comprises a piezoelectric vibrator, an amplifier device including inverters provided in a plurality of stages, and an inverter control device. The inverters provided in the plurality of stages includes a performance-variable inverter configured which is operational in both of an initial phase of oscillation startup and a post-startup phase where the oscillation is stabilized and capable of a variable performance depending on whether the initial phase of oscillation startup or the post-startup phase where the oscillation is stabilized, and an ON/OFF inverter which is operational in the initial phase of oscillation startup and disconnected in the post-startup phase where the oscillation is stabilized. The inverter control device have the performance-variable inverter and the ON/OFF inverter both operational and lowers the performance of the performance-variable inverter in the initial phase of oscillation startup, and the inverter control device disconnects the ON/OFF inverter and increases the performance of the performance-variable inverter in the post-startup phase where the oscillation is stabilized.
摘要翻译： 振荡电路包括压电振动器，包括设置在多个级中的反相器的放大器装置和逆变器控制装置。 设置在多级中的逆变器包括：性能可变逆变器，其配置为在振荡启动的初始阶段和振荡稳定的后启动阶段两者中都可操作，并且能够根据初始阶段 振荡启动或振荡稳定的后启动阶段，以及在振荡稳定初始阶段中振荡启动的初始阶段和断开的ON / OFF逆变器。 逆变器控制装置具有性能可变的变频器和ON / OFF变频器，在起动初始阶段均可使运行性能可变变频器的性能降低，变频器控制装置断开ON / OFF变频器， 性能可变的逆变器在振荡稳定的后启动阶段的性能。
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公开(公告)号：US08413523B2
公开(公告)日：2013-04-09
申请号：US13132556
申请日：2009-12-16
申请人： Daisuke Bessho
发明人： Daisuke Bessho
IPC分类号： G01F1/66
CPC分类号： H03B5/30 , G01F1/667 , H03B5/06 , H03K3/014 , H03K3/0307
摘要： An oscillation circuit has an oscillator having a resonant frequency, an amplifier connected to the oscillator, an energizing pulse generator for generating a energizing pulse within a certain range including the resonant frequency, a switching unit for switching between connection and disconnection of the energizing pulse generator and the oscillator, and the amplifier, and a motion command unit for sending a command signal to the energizing pulse generator for starting operation, in which the switching unit connects the oscillator and the energizing pulse generator during a cycle, a half cycle, or several cycles of the energizing pulse generated by the energizing pulse generator starting at a time when the motion command unit sends the motion signal.
摘要翻译： 振荡电路具有谐振频率的振荡器，连接到振荡器的放大器，用于在包括谐振频率的一定范围内产生激励脉冲的激励脉冲发生器，用于在激励脉冲发生器的连接和断开之间切换的切换单元 以及振荡器和放大器，以及运动命令单元，用于向用于启动操作的激励脉冲发生器发送命令信号，其中切换单元在周期，半周期或几个周期内连接振荡器和激励脉冲发生器 由运动命令单元发送运动信号时由激励脉冲发生器产生的通电脉冲的周期。
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公开(公告)号：US20120046005A1
公开(公告)日：2012-02-23
申请号：US12859601
申请日：2010-08-19
申请人： John Simmons , Kristopher Kaufman
发明人： John Simmons , Kristopher Kaufman
CPC分类号： H03L7/00 , H03K3/0307
摘要： In accordance with some embodiments of the present disclosure, an oscillator may include a crystal resonator and a squaring circuit coupled to the crystal resonator and configured to convert a sinusoidal signal produced by the crystal resonator to a square-wave signal, the squaring circuit comprising a bias circuit configured to transmit a selected bias voltage for the squaring circuit, the selected bias voltage selected from a plurality of potential bias voltages. In accordance with this and other embodiments of the present disclosure, an oscillator may include a crystal resonator, an inverter coupled in parallel with the crystal resonator, and a programmable voltage regulator coupled to the inverter. The programmable voltage regulator may be configured to supply a first supply voltage to the inverter during a startup duration of the oscillator, and supply a second supply voltage to the inverter after the startup duration, wherein the second supply voltage is lesser than the first supply voltage.
摘要翻译： 根据本公开的一些实施例，振荡器可以包括晶体谐振器和耦合到晶体谐振器的平方电路，并且被配置为将由晶体谐振器产生的正弦信号转换为方波信号，平方电路包括 偏置电路，被配置为传输用于所述平方电路的所选择的偏置电压，所述偏置电压从多个电位偏置电压中选择。 根据本公开的这个和其他实施例，振荡器可以包括晶体谐振器，与晶体谐振器并联耦合的反相器以及耦合到反相器的可编程电压调节器。 可编程稳压器可以被配置为在振荡器的启动持续时间期间向逆变器提供第一电源电压，并且在启动持续时间之后向逆变器提供第二电源电压，其中第二电源电压小于第一电源电压 。
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8.发明授权公开(公告)号：US08085104B2
公开(公告)日：2011-12-27
申请号：US12500845
申请日：2009-07-10
申请人： Yu-Tong Lin , Yun-Chieh Chen
发明人： Yu-Tong Lin , Yun-Chieh Chen
IPC分类号： H03B5/08
CPC分类号： H03L3/00 , H03K3/0307
摘要： An oscillation circuit, a driving circuit thereof, and a driving method thereof are provided. The driving circuit generates a second enable signal according to an output signal of an oscillator and a first enable signal. The second enable signal is transmitted to the oscillator. When a number of waves of the output signal within a predetermined period is smaller than a predetermined value, the driving circuit adjusts a voltage level of the second enable signal. A voltage level of the first enable signal is equal to an enable voltage level. Through variations in voltage levels of the second enable signal, the oscillator is triggered to oscillate.
摘要翻译： 提供了一种振荡电路及其驱动电路及其驱动方法。 驱动电路根据振荡器的输出信号和第一使能信号产生第二使能信号。 第二使能信号被发送到振荡器。 当预定周期内的输出信号的波数小于预定值时，驱动电路调节第二使能信号的电压电平。 第一使能信号的电压电平等于使能电压电平。 通过第二使能信号的电压电平的变化，振荡器被触发振荡。
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公开(公告)号：US20110156820A1
公开(公告)日：2011-06-30
申请号：US13041578
申请日：2011-03-07
IPC分类号： H03L7/00
CPC分类号： H04L7/0331 , G06F1/025 , G06F2211/902 , H03K3/0307 , H03L7/07 , H03L7/083 , H03L7/085 , H03L7/087 , H03L7/0991 , H03L7/0994 , H03L7/0995 , H03L7/10 , H03L7/235
摘要： A hybrid numeric-analog clock synchronizer, for establishing a clock or carrier locked to a timing reference. The clock may include a framing component. The reference may have a low update rate. The synchronizer achieves high jitter rejection, low phase noise and wide frequency range. It can be integrated on chip. It may comprise a numeric time-locked loop (TLL) with an analog phase-locked loop (PLL). Moreover a high-performance number-controlled oscillator (NCO), for creating an event clock from a master clock according to a period control signal. It processes edge times rather than period values, allowing direct control of the spectrum and peak amplitude of the justification jitter. Moreover a combined clock-and-frame asynchrony detector, for measuring the phase or time offset between composite signals. It responds e.g. to event clocks and frame syncs, enabling frame locking with loop bandwidths greater than the frame rate.
摘要翻译： 混合数字模拟时钟同步器，用于建立锁定到定时参考的时钟或载波。 时钟可以包括框架组件。 该参考可能具有较低的更新速率。 同步器实现了高抖动抑制，低相位噪声和宽频率范围。 它可以集成在芯片上。 它可以包括具有模拟锁相环（PLL）的数字锁相环（TLL）。 此外，还有一种高性能数控振荡器（NCO），用于根据周期控制信号从主时钟创建事件时钟。 它处理边沿时间而不是周期值，允许直接控制对齐抖动的频谱和峰值幅度。 此外，组合的时钟和帧异步检测器用于测量复合信号之间的相位或时间偏移。 它响应例如 到事件时钟和帧同步，使得具有大于帧速率的环路带宽的帧锁定。
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公开(公告)号：US07848709B2
公开(公告)日：2010-12-07
申请号：US11849954
申请日：2007-09-04
CPC分类号： H03B5/366 , G06F1/3203 , G06F1/324 , H03B5/06 , H03B2200/0046 , H03B2200/005 , H03B2200/0052 , H03B2200/0094 , H03K3/0307 , H03K3/3545 , H04W52/029 , Y02D10/126 , Y02D70/122 , Y02D70/142 , Y02D70/144
摘要： In one embodiment of the present invention, two crystal oscillator circuits are coupled in parallel to provide differing performance according to mode. Generally, a first circuit provides low phase noise and high accuracy while a second circuit provides greater phase noise within an acceptable tolerance while consuming significantly less power in a low power mode of operation. The second circuit includes an entirely separate amplifier for the low power operation that tolerates a relatively smaller input signal swing but that consumes even less power. The first circuit, which comprises selectable amplification elements, and the second circuit are coupled in parallel with selectable resistive elements and capacitive elements to provide varying amounts of amplification and filtering according to whether an operational mode is in a startup mode, a normal mode, or a low power mode of operation.
摘要翻译： 在本发明的一个实施例中，两个晶体振荡器电路并联耦合以根据模式提供不同的性能。 通常，第一电路提供低相位噪声和高精度，而第二电路在可接受的容限内提供更大的相位噪声，同时在低功率工作模式下消耗明显更低的功率。 第二电路包括用于低功率操作的完全分离的放大器，其容许相对较小的输入信号摆幅，但是消耗更少的功率。 包括可选放大元件的第一电路和第二电路与可选择的电阻元件和电容元件并联耦合，以根据操作模式是处于启动模式，正常模式还是在正常模式下提供不同量的放大和滤波 低功耗操作模式。
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