公开(公告)号：US07829937B2

公开(公告)日：2010-11-09

申请号：US11980351

申请日：2007-10-31

申请人： Sung-Hoon Lee ,  Sungil Park ,  Young-Gu Jin ,  Jongseob Kim ,  Ki-Ha Hong

发明人： Sung-Hoon Lee ,  Sungil Park ,  Young-Gu Jin ,  Jongseob Kim ,  Ki-Ha Hong

IPC分类号： H01L29/76 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L29/792 ,  G11C16/10 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/42328 ,  H01L29/66833

摘要： A semiconductor memory device performing an erase operation using an erase gate and a method of manufacturing the same are provided. The memory device may include a charge trap layer storing a first charge transfer medium having a first polarity and at least one erase gate. The at least one erase gate may be formed below the charge trap layer. A second charge transfer medium, which has a second polarity opposite to the first polarity, may be stored in the at least one erase gate. During the erase operation, the second charge transfer medium migrates to the charge trap layer causing the first charge transfer medium to combine with the second charge transfer medium.

摘要翻译： 提供了使用擦除栅极执行擦除操作的半导体存储器件及其制造方法。 存储器件可以包括存储具有第一极性的第一电荷转移介质和至少一个擦除栅极的电荷陷阱层。 至少一个擦除栅极可以形成在电荷陷阱层下面。 具有与第一极性相反的第二极性的第二电荷转移介质可以存储在至少一个擦除栅中。 在擦除操作期间，第二电荷转移介质迁移到电荷捕获层，使得第一电荷转移介质与第二电荷转移介质组合。

公开(公告)号：US20080164510A1

公开(公告)日：2008-07-10

申请号：US11980351

申请日：2007-10-31

申请人： Sung-Hoon Lee ,  Sungil Park ,  Young-Gu Jin ,  Jongseob Kim ,  Ki-Ha Hong

发明人： Sung-Hoon Lee ,  Sungil Park ,  Young-Gu Jin ,  Jongseob Kim ,  Ki-Ha Hong

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L29/792 ,  G11C16/10 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/42328 ,  H01L29/66833

摘要： A semiconductor memory device performing an erase operation using an erase gate and a method of manufacturing the same are provided. The memory device may include a charge trap layer storing a first charge transfer medium having a first polarity and at least one erase gate. The at least one erase gate may be formed below the charge trap layer. A second charge transfer medium, which has a second polarity opposite to the first polarity, may be stored in the at least one erase gate. During the erase operation, the second charge transfer medium migrates to the charge trap layer causing the first charge transfer medium to combine with the second charge transfer medium.

摘要翻译： 提供了使用擦除栅极执行擦除操作的半导体存储器件及其制造方法。 存储器件可以包括存储具有第一极性的第一电荷转移介质和至少一个擦除栅极的电荷陷阱层。 至少一个擦除栅极可以形成在电荷陷阱层下面。 具有与第一极性相反的第二极性的第二电荷转移介质可以存储在至少一个擦除栅中。 在擦除操作期间，第二电荷转移介质迁移到电荷捕获层，使得第一电荷转移介质与第二电荷转移介质组合。

公开(公告)号：US08119480B2

公开(公告)日：2012-02-21

申请号：US12923593

申请日：2010-09-29

申请人： Sung-Hoon Lee ,  Sungil Park ,  Young-Gu Jin ,  Jongseob Kim ,  Ki-Ha Hong

发明人： Sung-Hoon Lee ,  Sungil Park ,  Young-Gu Jin ,  Jongseob Kim ,  Ki-Ha Hong

IPC分类号： H01L21/336

CPC分类号： H01L29/792 ,  G11C16/10 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/42328 ,  H01L29/66833

摘要： A semiconductor memory device performing an erase operation using an erase gate and a method of manufacturing the same are provided. The memory device may include a charge trap layer storing a first charge transfer medium having a first polarity and at least one erase gate. The at least one erase gate may be formed below the charge trap layer. A second charge transfer medium, which has a second polarity opposite to the first polarity, may be stored in the at least one erase gate. During the erase operation, the second charge transfer medium migrates to the charge trap layer causing the first charge transfer medium to combine with the second charge transfer medium.

摘要翻译： 提供了使用擦除栅极执行擦除操作的半导体存储器件及其制造方法。 存储器件可以包括存储具有第一极性的第一电荷转移介质和至少一个擦除栅极的电荷陷阱层。 至少一个擦除栅极可以形成在电荷陷阱层下面。 具有与第一极性相反的第二极性的第二电荷转移介质可以存储在至少一个擦除栅中。 在擦除操作期间，第二电荷转移介质迁移到电荷捕获层，使得第一电荷转移介质与第二电荷转移介质组合。

公开(公告)号：US20110021014A1

公开(公告)日：2011-01-27

申请号：US12923593

申请日：2010-09-29

申请人： Sung-Hoon Lee ,  Sungil Park ,  Young-Gu Jin ,  Jongseob Kim ,  Ki-Ha Hong

发明人： Sung-Hoon Lee ,  Sungil Park ,  Young-Gu Jin ,  Jongseob Kim ,  Ki-Ha Hong

IPC分类号： H01L21/336

CPC分类号： H01L29/792 ,  G11C16/10 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/42328 ,  H01L29/66833

摘要： A semiconductor memory device performing an erase operation using an erase gate and a method of manufacturing the same are provided. The memory device may include a charge trap layer storing a first charge transfer medium having a first polarity and at least one erase gate. The at least one erase gate may be formed below the charge trap layer. A second charge transfer medium, which has a second polarity opposite to the first polarity, may be stored in the at least one erase gate. During the erase operation, the second charge transfer medium migrates to the charge trap layer causing the first charge transfer medium to combine with the second charge transfer medium.

摘要翻译： 提供了使用擦除栅极执行擦除操作的半导体存储器件及其制造方法。 存储器件可以包括存储具有第一极性的第一电荷转移介质和至少一个擦除栅极的电荷陷阱层。 至少一个擦除栅极可以形成在电荷陷阱层下面。 具有与第一极性相反的第二极性的第二电荷转移介质可以存储在至少一个擦除栅中。 在擦除操作期间，第二电荷转移介质迁移到电荷捕获层，使得第一电荷转移介质与第二电荷转移介质组合。