Abstract:
A fuel cell separator, a fuel cell stack having the fuel cell separator, and a reactant gas control method of the fuel cell stack are provided. That is, even when the fuel cell stack operates under the low load operation condition, a reactant gas is supplied to the reactant gas passages of the fuel cell separator, and thus, the length of the passage can be shortened by 50% as compared with the prior art having only one reactant gas passage. Therefore, the reactant gas can be effectively supplied without experiencing pressure loss. Further, in the high load operation of the fuel cell stack, the reactant gas is introduced into the first reactant gas passage of the fuel cell separator and utilized in half of the whole electrode area. Subsequently, the reactant gas is introduced into the second reactant gas passage and utilized in the remaining half of the electrode area. The flow rate of the reactant gas flowing along the passage channels is increased by two times, even when the reactant gas utilizing rate is identical as compared with the reactant gas flow in the low load operation. As a result, the moisture existing in the passage channels can be more effectively discharged and the flooding phenomenon occurring in the high load operation can be prevented. By controlling the reactant gas supply in accordance with an operation condition of the fuel cell stack without experiencing pressure loss and deterioration of the utilizing rate, the flooding phenomenon and concentration polarization phenomenon that occur in the fuel cell stack can be prevented.
Abstract:
A graphene electronic device and a method of fabricating the graphene electronic device are provided. The graphene electronic device may include a graphene channel layer formed on a hydrophobic polymer layer, and a passivation layer formed on the graphene channel layer. The hydrophobic polymer layer may prevent or reduce adsorption of impurities to transferred graphene, and a passivation layer may also prevent or reduce adsorption of impurities to a heat-treated graphene channel layer.
Abstract:
The graphene electronic device may include a gate oxide on a conductive substrate, the conductive substrate configured to function as a gate electrode, a pair of first metals on the gate oxide, the pair of the first metals separate from each other, a graphene channel layer extending between the first metals and on the first metals, and a source electrode and a drain electrode on both edges of the graphene channel layer.
Abstract:
In a semiconductor device including graphene, a gate insulating layer may be formed between a gate electrode and a graphene layer, and an interlayer insulating layer may be formed under a portion of the graphene layer under which the gate insulating layer is not formed. The gate insulating layer may include a material that has higher dielectric permittivity than the interlayer insulating layer.
Abstract:
In a semiconductor device including graphene, a gate insulating layer may be formed between a gate electrode and a graphene layer, and an interlayer insulating layer may be formed under a portion of the graphene layer under which the gate insulating layer is not formed. The gate insulating layer may include a material that has higher dielectric permittivity than the interlayer insulating layer.
Abstract:
A hybrid printing method using a movable pallet is provided. The movable pallet is used to apply various desired inks on the surface of fabric products and the like. A printing process, a digital printing process, a multicolor foiling process and a multi-color flocking process provides a variety of designs and colors, dissimilar to the conventional method enabling a simple design and a single color work. The method is not an integral (fixed) type and thus is carried out as a selective work for each individual process, thereby improving productivity by more 100-150% as compared to the conventional facility. The movable pallet is formed of a thin aluminum plate of 3-4 mm thickness to minimize the time required for heating and cooling and to provide for easy attachment and detachment due to its light weight. The pallet is supported on a pallet bracket to avoid bending or distortion.
Abstract:
A memory system is provided includes a host processor, and a plurality of cascade connected memory cards connected to the host processor. Each of the memory cards stores a same default relative card address (RCA) prior to initialization of the memory system. The host processor is configured to sequentially access each memory card using the default RCA, and to change the default RCA to a unique RCA upon each sequential access.
Abstract:
A method of forming a gate of a semiconductor device comprising providing a semiconductor substrate over which a gate insulating layer, a first conductive layer, a dielectric layer, and a second conductive layer are sequentially formed, the semiconductor substrate defining gate line regions; removing he second conductive layer between gate line regions; removing the dielectric layer so that a top surface of the first conductive layer between the gate line regions is exposed; performing a first etch process in order to lower a height of the first conductive layer between the gate line region; removing he dielectric layer between the gate line regions; and, performing a second etch process in order to remove the first conductive layer between the gate line regions.
Abstract:
Provided is a method of operating a nonvolatile memory device to perform an erase operation. The method includes applying a composite pulse including a direct current (DC) pulse and a DC perturbation pulse to the nonvolatile memory device to perform the erase operation.
Abstract:
A semiconductor device having pads is provided. The semiconductor device includes first pads formed along a first row, and second pads formed along a second row. The first via contact portions extending from the first pads toward the second row, and second via contact portions extending from the second pads toward the first row. The first and second via contact portions are arranged along a third row between the first and second rows.