公开(公告)号：US20100188361A1

公开(公告)日：2010-07-29

申请号：US12616717

申请日：2009-11-11

申请人： Sung-Man Kim ,  Beom-Jun Kim ,  Sun-Kyu Joo ,  Hong-Woo Lee

发明人： Sung-Man Kim ,  Beom-Jun Kim ,  Sun-Kyu Joo ,  Hong-Woo Lee

IPC分类号： G06F3/044 ,  H01J9/00

CPC分类号： G02F1/136286 ,  G02F1/13338 ,  G02F2001/13629 ,  G02F2001/136295 ,  G02F2201/40

摘要： A display panel and a method of manufacturing the same are provided, which can prevent the deterioration of input sensitivity to the panel, and maximize the aperture ratio of the panel. The display panel includes a first substrate, a gate line and a data line crossing each other on the first substrate, in a manner that the gate line and the data line are electrically insulated from each other. The display panel further comprises a first sensor wire formed in parallel to the data line, a second sensor wire formed to overlap the data line in parallel to the data line, a second substrate arranged opposite to the first substrate, and a sensor spacer formed on the second substrate to project toward the first substrate.

摘要翻译： 提供了一种显示面板及其制造方法，可以防止对面板的输入灵敏度的劣化，并使面板的开口率最大化。 显示面板包括在栅极线和数据线彼此电绝缘的方式在第一衬底上彼此交叉的第一衬底，栅极线和数据线。 显示面板还包括与数据线平行地形成的第一传感器线，与数据线平行地形成为与数据线重叠的第二传感器线，与第一基板相对布置的第二基板和形成在第一基板上的传感器间隔件 第二基板朝向第一基板突出。

公开(公告)号：US08203539B2

公开(公告)日：2012-06-19

申请号：US12616717

申请日：2009-11-11

申请人： Sung-Man Kim ,  Beom-Jun Kim ,  Sun-Kyu Joo ,  Hong-Woo Lee

发明人： Sung-Man Kim ,  Beom-Jun Kim ,  Sun-Kyu Joo ,  Hong-Woo Lee

IPC分类号： G06F3/045

CPC分类号： G02F1/136286 ,  G02F1/13338 ,  G02F2001/13629 ,  G02F2001/136295 ,  G02F2201/40

摘要： A display panel and a method of manufacturing the same are provided, which can prevent the deterioration of input sensitivity to the panel, and maximize the aperture ratio of the panel. The display panel includes a first substrate, a gate line and a data line crossing each other on the first substrate, in a manner that the gate line and the data line are electrically insulated from each other. The display panel further comprises a first sensor wire formed in parallel to the data line, a second sensor wire formed to overlap the data line in parallel to the data line, a second substrate arranged opposite to the first substrate, and a sensor spacer formed on the second substrate to project toward the first substrate.

摘要翻译： 提供了一种显示面板及其制造方法，可以防止对面板的输入灵敏度的劣化，并使面板的开口率最大化。 显示面板包括在栅极线和数据线彼此电绝缘的方式在第一衬底上彼此交叉的第一衬底，栅极线和数据线。 显示面板还包括与数据线平行地形成的第一传感器线，与数据线平行地形成为与数据线重叠的第二传感器线，与第一基板相对布置的第二基板和形成在第一基板上的传感器间隔件 第二基板朝向第一基板突出。

公开(公告)号：US20090190082A1

公开(公告)日：2009-07-30

申请号：US12181678

申请日：2008-07-29

申请人： Hong-Woo Lee ,  Jong-Oh Kim ,  Sung-Man Kim ,  Sun-Kyu Joo ,  Bong-Jun Lee ,  Jae-Min Shin

发明人： Hong-Woo Lee ,  Jong-Oh Kim ,  Sung-Man Kim ,  Sun-Kyu Joo ,  Bong-Jun Lee ,  Jae-Min Shin

IPC分类号： G02F1/1343

CPC分类号： G02F1/136213

摘要： A display substrate includes a first switching element, a second switching element, a first pixel electrode, a second pixel electrode, a main storage electrode and a sub-storage electrode. The first switching element is connected to a data line and a first gate line. The second switching element is connected to the data line and a second gate line adjacent to the first gate line. The first pixel electrode is electrically connected to the first switching element. The second pixel electrode is electrically connected to the second switching element. The main storage electrode is disposed in an area between the first pixel electrode and the second electrode to overlap with first ends of the first and second pixel electrodes. The sub-storage electrode is spaced apart from the first and second gate lines.

摘要翻译： 显示基板包括第一开关元件，第二开关元件，第一像素电极，第二像素电极，主存储电极和副存储电极。 第一开关元件连接到数据线和第一栅极线。 第二开关元件连接到数据线和与第一栅极线相邻的第二栅极线。 第一像素电极电连接到第一开关元件。 第二像素电极电连接到第二开关元件。 主存储电极设置在第一像素电极和第二电极之间的区域中，以与第一和第二像素电极的第一端重叠。 副存储电极与第一和第二栅极线间隔开。

公开(公告)号：US08203682B2

公开(公告)日：2012-06-19

申请号：US12181678

申请日：2008-07-29

申请人： Hong-Woo Lee ,  Jong-Oh Kim ,  Sung-Man Kim ,  Sun-Kyu Joo ,  Bong-Jun Lee ,  Jae-Min Shin

发明人： Hong-Woo Lee ,  Jong-Oh Kim ,  Sung-Man Kim ,  Sun-Kyu Joo ,  Bong-Jun Lee ,  Jae-Min Shin

IPC分类号： G02F1/1343

CPC分类号： G02F1/136213

摘要： A display substrate includes a first switching element, a second switching element, a first pixel electrode, a second pixel electrode, a main storage electrode and a sub-storage electrode. The first switching element is connected to a data line and a first gate line. The second switching element is connected to the data line and a second gate line adjacent to the first gate line. The first pixel electrode is electrically connected to the first switching element. The second pixel electrode is electrically connected to the second switching element. The main storage electrode is disposed in an area between the first pixel electrode and the second electrode to overlap with first ends of the first and second pixel electrodes. The sub-storage electrode is spaced apart from the first and second gate lines.

摘要翻译： 显示基板包括第一开关元件，第二开关元件，第一像素电极，第二像素电极，主存储电极和副存储电极。 第一开关元件连接到数据线和第一栅极线。 第二开关元件连接到数据线和与第一栅极线相邻的第二栅极线。 第一像素电极电连接到第一开关元件。 第二像素电极电连接到第二开关元件。 主存储电极设置在第一像素电极和第二电极之间的区域中，以与第一和第二像素电极的第一端重叠。 副存储电极与第一和第二栅极线间隔开。

公开(公告)号：US20120218486A1

公开(公告)日：2012-08-30

申请号：US13468583

申请日：2012-05-10

申请人： Hong-Woo Lee ,  Jong-Oh Kim ,  Sung-Man Kim ,  Sun-Kyu Joo ,  Bong-Jun Lee ,  Jae-Min Shin

发明人： Hong-Woo Lee ,  Jong-Oh Kim ,  Sung-Man Kim ,  Sun-Kyu Joo ,  Bong-Jun Lee ,  Jae-Min Shin

IPC分类号： G02F1/136

CPC分类号： G02F1/136213

摘要： A display substrate includes a first switching element, a second switching element, a first pixel electrode, a second pixel electrode, a main storage electrode and a sub-storage electrode. The first switching element is connected to a data line and a first gate line. The second switching element is connected to the data line and a second gate line adjacent to the first gate line. The first pixel electrode is electrically connected to the first switching element. The second pixel electrode is electrically connected to the second switching element. The main storage electrode is disposed in an area between the first pixel electrode and the second electrode to overlap with first ends of the first and second pixel electrodes. The sub-storage electrode is spaced apart from the first and second gate lines.

摘要翻译： 显示基板包括第一开关元件，第二开关元件，第一像素电极，第二像素电极，主存储电极和副存储电极。 第一开关元件连接到数据线和第一栅极线。 第二开关元件连接到数据线和与第一栅极线相邻的第二栅极线。 第一像素电极电连接到第一开关元件。 第二像素电极电连接到第二开关元件。 主存储电极设置在第一像素电极和第二电极之间的区域中，以与第一和第二像素电极的第一端重叠。 副存储电极与第一和第二栅极线间隔开。

公开(公告)号：US08384870B2

公开(公告)日：2013-02-26

申请号：US13468583

申请日：2012-05-10

申请人： Hong-Woo Lee ,  Jong-Oh Kim ,  Sung-Man Kim ,  Sun-Kyu Joo ,  Bong-Jun Lee ,  Jae-Min Shin

发明人： Hong-Woo Lee ,  Jong-Oh Kim ,  Sung-Man Kim ,  Sun-Kyu Joo ,  Bong-Jun Lee ,  Jae-Min Shin

IPC分类号： G02F1/1343

CPC分类号： G02F1/136213

摘要： A display substrate includes a first switching element, a second switching element, a first pixel electrode, a second pixel electrode, a main storage electrode and a sub-storage electrode. The first switching element is connected to a data line and a first gate line. The second switching element is connected to the data line and a second gate line adjacent to the first gate line. The first pixel electrode is electrically connected to the first switching element. The second pixel electrode is electrically connected to the second switching element. The main storage electrode is disposed in an area between the first pixel electrode and the second electrode to overlap with first ends of the first and second pixel electrodes. The sub-storage electrode is spaced apart from the first and second gate lines.

摘要翻译： 显示基板包括第一开关元件，第二开关元件，第一像素电极，第二像素电极，主存储电极和副存储电极。 第一开关元件连接到数据线和第一栅极线。 第二开关元件连接到数据线和与第一栅极线相邻的第二栅极线。 第一像素电极电连接到第一开关元件。 第二像素电极电连接到第二开关元件。 主存储电极设置在第一像素电极和第二电极之间的区域中，以与第一和第二像素电极的第一端重叠。 副存储电极与第一和第二栅极线间隔开。

公开(公告)号：US08194026B2

公开(公告)日：2012-06-05

申请号：US11782957

申请日：2007-07-25

申请人： Hong-Woo Lee ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Beom-Jun Kim ,  Sung-Man Kim

发明人： Hong-Woo Lee ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Beom-Jun Kim ,  Sung-Man Kim

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2320/02 ,  G09G2330/08 ,  G11C19/28

摘要： A gate driver comprises a shift register that has a plurality of stages connected together and outputs a gate signal comprising a first pulse and a second pulse to a gate line. A stage includes a holding part, a pre-charging part, a pull-up part, and a pull-down part. The holding part discharges an output terminal to an off-voltage in response to a first clock signal. The pre-charging part turns off the holding part and outputs the first clock signal as the first pulse to the output terminal in response to an output signal of a previous stage. The pull-up part outputs a second clock signal as the second pulse to the output terminal in response to the output signal of the previous stage. The pull-down part discharges the first output terminal to the off-voltage in response to an output signal of a next stage.

摘要翻译： 栅极驱动器包括具有连接在一起的多个级的移位寄存器，并将包括第一脉冲和第二脉冲的门信号输出到栅极线。 舞台包括保持部分，预充电部分，上拉部分和下拉部分。 保持部分响应于第一时钟信号将输出端子放电到截止电压。 预充电部件关闭保持部件，并响应于前一级的输出信号将第一时钟信号作为第一脉冲输出到输出端子。 上拉部分响应于前一级的输出信号，将第二时钟信号作为第二脉冲输出到输出端。 下拉部分响应于下一级的输出信号将第一输出端子放电到截止电压。

公开(公告)号：US08098227B2

公开(公告)日：2012-01-17

申请号：US12338182

申请日：2008-12-18

申请人： Hong-Woo Lee ,  Jong-Hwan Lee ,  Beom-Jun Kim ,  Sung-Man Kim ,  Gyu-Tae Kim ,  Kyoung-Jun Jang

发明人： Hong-Woo Lee ,  Jong-Hwan Lee ,  Beom-Jun Kim ,  Sung-Man Kim ,  Gyu-Tae Kim ,  Kyoung-Jun Jang

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G11C19/184 ,  H03K17/165

摘要： A gate driving circuit includes cascaded stages, each including a pull-up part, a carry part, a pull-up driving part, a holding part and an inverter. The pull-up part pulls up a gate voltage to an input clock. The carry part pulls up a carry voltage to the input clock. The pull-up driving part is connected to a control terminal (Q-node) common to the carry part and the pull-up part, and receives a previous carry voltage from a previous stage to turn on the pull-up part and the carry part. The holding part holds the gate voltage at an off-voltage, and the inverter controls at least one of turning on the holding part and turning off the holding part based on an inverter clock. A high level of the inverter clock in a given horizontal period (1H) temporally precedes a high level of the input clock by a predetermined time interval.

摘要翻译： 栅极驱动电路包括级联级，每级包括上拉部分，进位部分，上拉驱动部分，保持部分和逆变器。 上拉部分将输入时钟的栅极电压上拉。 进位部分将输入电压提升到输入时钟。 上拉驱动部分连接到与进位部分和上拉部分相同的控制端子（Q-节点），并且从前一级接收先前的进位电压以打开上拉部分和进位 部分。 保持部将栅极电压保持在截止电压，逆变器基于逆变器时钟来控制保持部的开启和关闭保持部中的至少一个。 给定水平周期（1H）中的高电平的反相器时钟在时间上在预定时间间隔的输入时钟的高电平之前。

公开(公告)号：US07612863B2

公开(公告)日：2009-11-03

申请号：US11744457

申请日：2007-05-04

申请人： Beom-Jun Kim ,  Jong-Hwan Lee ,  Sang-Jin Jeon ,  Sung-Man Kim ,  Bong-Jun Lee ,  Hong-Woo Lee

发明人： Beom-Jun Kim ,  Jong-Hwan Lee ,  Sang-Jin Jeon ,  Sung-Man Kim ,  Bong-Jun Lee ,  Hong-Woo Lee

IPC分类号： G02F1/13 ,  G02F1/1343 ,  G02F1/1333 ,  G02F1/136

CPC分类号： G02F1/136213 ,  G02F1/136259 ,  G02F1/136286

摘要： A liquid crystal display that is subject to pixel-high defects due to manufacturing anomalies is provided with programmable repair means for each pixel electrode. In one embodiment, a transistor-array substrate is provided with plural gate lines that are separated from each other by a first interval, plural data lines that are insulated from the gate lines while crossing the gate lines, and separated from each other by a second interval larger than the first interval, thereby defining plural pixel areas. Each pixel area has a corresponding pixel unit comprising a switching device, pixel electrode, and repair electrode. The repair electrode branches from a neighboring gate line and extends such that the repair electrode is in overlapping spaced-apart relation with the pixel electrode and selectively connectable to the pixel electrode. Accordingly, a pixel where a high pixel defect occurs can be repaired by selective connection with the repair electrode, thereby improving display quality of the liquid crystal display.

摘要翻译： 由于制造异常而受到像素高缺陷的液晶显示器，为每个像素电极提供可编程修复装置。 在一个实施例中，晶体管阵列基板设置有多个栅极线，它们彼此分开第一间隔，多条数据线在与栅极线交叉时与栅极线绝缘并且彼此分开第二个 间隔大于第一间隔，从而限定多个像素区域。 每个像素区域具有包括开关器件，像素电极和修复电极的对应像素单元。 修复电极从相邻的栅极线分支并延伸，使得修复电极与像素电极重叠间隔开，并且可选择性地连接到像素电极。 因此，可以通过与修复电极的选择性连接来修复发生高像素缺陷的像素，从而提高液晶显示器的显示质量。

公开(公告)号：US20090189679A1

公开(公告)日：2009-07-30

申请号：US12338182

申请日：2008-12-18

申请人： Hong-Woo Lee ,  Jong-Hwan Lee ,  Beom-Jun Kim ,  Sung-Man Kim ,  Gyu-Tae Kim ,  Kyoung-Jun Jang

发明人： Hong-Woo Lee ,  Jong-Hwan Lee ,  Beom-Jun Kim ,  Sung-Man Kim ,  Gyu-Tae Kim ,  Kyoung-Jun Jang

IPC分类号： H03K17/687 ,  G02F1/1368

CPC分类号： G09G3/3677 ,  G11C19/184 ,  H03K17/165

摘要： A gate driving circuit includes cascaded stages, each including a pull-up part, a carry part, a pull-up driving part, a holding part and an inverter. The pull-up part pulls up a gate voltage to an input clock. The carry part pulls up a carry voltage to the input clock. The pull-up driving part is connected to a control terminal (Q-node) common to the carry part and the pull-up part, and receives a previous carry voltage from a previous stage to turn on the pull-up part and the carry part. The holding part holds the gate voltage at an off-voltage, and the inverter controls at least one of turning on the holding part and turning off the holding part based on an inverter clock. A high level of the inverter clock in a given horizontal period (1H) temporally precedes a high level of the input clock by a predetermined time interval.

摘要翻译： 栅极驱动电路包括级联级，每级包括上拉部分，进位部分，上拉驱动部分，保持部分和逆变器。 上拉部分将输入时钟的栅极电压上拉。 进位部分将输入电压提升到输入时钟。 上拉驱动部分连接到与进位部分和上拉部分相同的控制端子（Q-节点），并且从前一级接收先前的进位电压以打开上拉部分和进位 部分。 保持部将栅极电压保持在截止电压，逆变器基于逆变器时钟来控制保持部的开启和关闭保持部中的至少一个。 给定水平周期（1H）中的高电平的反相器时钟在时间上在预定时间间隔的输入时钟的高电平之前。