利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

17 条记录 (耗时 0.017 秒)

    METHOD FOR MANUFACTURING SUBSTRATE FOR SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR DEVICE
    2.
    发明申请
    METHOD FOR MANUFACTURING SUBSTRATE FOR SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR DEVICE 有权
    用于制造半导体元件的衬底的方法和半导体器件

    公开(公告)号：US20120018860A1

    公开(公告)日：2012-01-26

    申请号：US13249702

    申请日：2011-09-30

    申请人： Susumu MANIWA ,  Takehito Tsukamoto ,  Junko Toda

    发明人： Susumu MANIWA ,  Takehito Tsukamoto ,  Junko Toda

    IPC分类号： H01L23/495 ,  H01L21/48

    CPC分类号： H01L23/49861 ,  H01L21/486 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/12042 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

    摘要： Provided is a manufacturing method of a substrate for a semiconductor element including the steps of: providing a first photosensitive resin layer on a first surface of a metal plate; providing a second photosensitive resin layer on a second surface different from the first surface of the metal plate; forming a first etching mask for forming a connection post on the first surface of the metal plate; forming a second etching mask for forming a wiring pattern on the second surface of the metal plate; forming the connection post by performing an etching from the first surface to a midway of the metal plate; filling in a premold resin to a portion of the first surface where the connection post does not exist; processing so that a height of the connection post of the first surface is lower than a height of the premold resin surrounding the connection post; and forming the wiring pattern by performing an etching on the second surface.

    摘要翻译： 本发明提供一种半导体元件用基板的制造方法，其特征在于，包括：在金属板的第一面上设置第一感光性树脂层; 在与金属板的第一表面不同的第二表面上提供第二感光性树脂层; 形成用于在金属板的第一表面上形成连接柱的第一蚀刻掩模; 形成用于在所述金属板的第二表面上形成布线图案的第二蚀刻掩模; 通过从第一表面到金属板的中间进行蚀刻来形成连接柱; 将预糊树脂填充到不存在连接柱的第一表面的一部分; 处理，使得第一表面的连接柱的高度低于围绕连接柱的预制树脂的高度; 以及通过在所述第二表面上进行蚀刻来形成所述布线图案。

    Lead frame substrate and method of manufacturing the same
    4.
    发明申请
    Lead frame substrate and method of manufacturing the same 有权
    引线框架基板及其制造方法

    公开(公告)号：US20110169153A1

    公开(公告)日：2011-07-14

    申请号：US13064314

    申请日：2011-03-17

    申请人： Takehito Tsukamoto ,  Susumu Maniwa ,  Junko Toda

    发明人： Takehito Tsukamoto ,  Susumu Maniwa ,  Junko Toda

    IPC分类号： H01L23/495 ,  H01L21/48

    CPC分类号： H01L21/4832 ,  H01L23/3121 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00012 ,  H01L2924/00

    摘要： A method includes: forming a photoresist pattern to form each of a semiconductor element mounting section on which a semiconductor element is mounted, semiconductor element electrode connection terminals for connection with electrodes of the semiconductor element, and a first outer frame section on a first surface of a metal plate; forming a photoresist pattern to form each of external connection terminals, a second outer frame section, and grooves in at least a part of the second outer frame section on a second surface of the metal plate; etching a metal plate exposing section, in which the metal plate of the second surface is exposed, to form holes that do not pass through the metal plate exposing section and grooves that run from an inside to an outside of the second outer frame section; coating a pre-mold resin on the holes and the grooves, and heating the pre-mold resin under pressure using a flat-bed press to form a resin layer; and etching the first surface to form the semiconductor element mounting section, the semiconductor element electrode connection terminals electrically connected with the external connection terminals, and the first outer frame section.

    摘要翻译： 一种方法包括：形成光致抗蚀剂图案以形成其上安装有半导体元件的半导体元件安装部分，用于与半导体元件的电极连接的半导体元件电极连接端子和在第一表面上的第一外部框架部分 金属板; 形成光致抗蚀剂图案以在所述金属板的第二表面上形成外部连接端子，第二外部框架部分和所述第二外部框架部分的至少一部分中的凹槽中的每一个; 蚀刻金属板暴露部分，其中第二表面的金属板被暴露，以形成不穿过金属板暴露部分的孔和从第二外框架部分的内部延伸到外部的槽; 在孔和槽上涂覆预模制树脂，并使用平板压机在压力下加热预模制树脂以形成树脂层; 并且蚀刻所述第一表面以形成所述半导体元件安装部，所述半导体元件电极连接端子与所述外部连接端子电连接，所述第一外部框架部分。

    Method of manufacturing substrate for semiconductor element, and semiconductor device
    6.
    发明授权
    Method of manufacturing substrate for semiconductor element, and semiconductor device 有权
    半导体元件用基板的制造方法及半导体装置

    公开(公告)号：US08535987B2

    公开(公告)日：2013-09-17

    申请号：US13249925

    申请日：2011-09-30

    申请人： Susumu Maniwa ,  Takehito Tsukamoto ,  Junko Toda

    发明人： Susumu Maniwa ,  Takehito Tsukamoto ,  Junko Toda

    IPC分类号： H01L21/00

    CPC分类号： H01L21/486 ,  H01L23/49861 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A manufacturing method of a substrate for a semiconductor element, wherein a first step includes: forming a first and second photosensitive resin layer on a first and second surface of a metal plate, respectively; forming a first and second resist pattern on the first and second surface, for forming a connection post and a wiring pattern, respectively. A second step includes: forming the connection post and wiring pattern; filling in a premold liquid resin to the first surface which was etched; forming a premold resin layer by hardening the premold liquid resin; performing a grinding operation on the first surface, and exposing an upper bottom surface of the connection post from the premold resin layer. A groove structure is formed by the first and second steps, wherein a depth of the groove is up to an intermediate part in a thickness direction of the metal plate.

    摘要翻译： 一种半导体元件用基板的制造方法，其特征在于，第一工序包括：在金属板的第一和第二表面上分别形成第一和第二感光性树脂层; 在第一和第二表面上形成第一和第二抗蚀剂图案，分别形成连接柱和布线图案。 第二步包括：形成连接柱和布线图案; 将预浸液体树脂填充到被蚀刻的第一表面上; 通过硬化预制液体树脂来形成预制树脂层; 在所述第一表面上执行研磨操作，以及将所述连接柱的上底表面暴露于所述预制树脂层。 通过第一和第二步骤形成凹槽结构，其中凹槽的深度直到金属板的厚度方向上的中间部分。

    Lead frame substrate and method of manufacturing the same
    9.
    发明授权
    Lead frame substrate and method of manufacturing the same 有权
    引线框架基板及其制造方法

    公开(公告)号：US08304294B2

    公开(公告)日：2012-11-06

    申请号：US13064314

    申请日：2011-03-17

    申请人： Takehito Tsukamoto ,  Susumu Maniwa ,  Junko Toda

    发明人： Takehito Tsukamoto ,  Susumu Maniwa ,  Junko Toda

    IPC分类号： H01L21/00

    CPC分类号： H01L21/4832 ,  H01L23/3121 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00012 ,  H01L2924/00

    摘要： A method includes: forming a photoresist pattern to form each of a semiconductor element mounting section on which a semiconductor element is mounted, semiconductor element electrode connection terminals for connection with electrodes of the semiconductor element, and a first outer frame section on a first surface of a metal plate; forming a photoresist pattern to form each of external connection terminals, a second outer frame section, and grooves in at least a part of the second outer frame section on a second surface of the metal plate; etching a metal plate exposing section, in which the metal plate of the second surface is exposed, to form holes that do not pass through the metal plate exposing section and grooves that run from an inside to an outside of the second outer frame section; coating a pre-mold resin on the holes and the grooves, and heating the pre-mold resin under pressure using a flat-bed press to form a resin layer; and etching the first surface to form the semiconductor element mounting section, the semiconductor element electrode connection terminals electrically connected with the external connection terminals, and the first outer frame section.

    摘要翻译： 一种方法包括：形成光致抗蚀剂图案以形成其上安装有半导体元件的半导体元件安装部分，用于与半导体元件的电极连接的半导体元件电极连接端子和在第一表面上的第一外部框架部分 金属板; 形成光致抗蚀剂图案以在所述金属板的第二表面上形成外部连接端子，第二外部框架部分和所述第二外部框架部分的至少一部分中的凹槽中的每一个; 蚀刻金属板暴露部分，其中第二表面的金属板被暴露，以形成不穿过金属板暴露部分的孔和从第二外框架部分的内部延伸到外部的槽; 在孔和槽上涂覆预模制树脂，并使用平板压机在压力下加热预模制树脂以形成树脂层; 并且蚀刻所述第一表面以形成所述半导体元件安装部，所述半导体元件电极连接端子与所述外部连接端子电连接，所述第一外部框架部分。

    Method for manufacturing substrate for semiconductor element, and semiconductor device
    10.
    发明授权
    Method for manufacturing substrate for semiconductor element, and semiconductor device 有权
    半导体元件用基板的制造方法以及半导体装置

    公开(公告)号：US08466547B2

    公开(公告)日：2013-06-18

    申请号：US13249702

    申请日：2011-09-30

    申请人： Susumu Maniwa ,  Takehito Tsukamoto ,  Junko Toda

    发明人： Susumu Maniwa ,  Takehito Tsukamoto ,  Junko Toda

    IPC分类号： H01L23/04

    CPC分类号： H01L23/49861 ,  H01L21/486 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/12042 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

    摘要： Provided is a manufacturing method of a substrate for a semiconductor element including the steps of: providing a first photosensitive resin layer on a first surface of a metal plate; providing a second photosensitive resin layer on a second surface different from the first surface of the metal plate; forming a first etching mask for forming a connection post on the first surface of the metal plate; forming a second etching mask for forming a wiring pattern on the second surface of the metal plate; forming the connection post by performing an etching from the first surface to a midway of the metal plate; filling in a premold resin to a portion of the first surface where the connection post does not exist; processing so that a height of the connection post of the first surface is lower than a height of the premold resin surrounding the connection post; and forming the wiring pattern by performing an etching on the second surface.

    摘要翻译： 本发明提供一种半导体元件用基板的制造方法，其特征在于，包括：在金属板的第一面上设置第一感光性树脂层; 在与金属板的第一表面不同的第二表面上提供第二感光性树脂层; 形成用于在金属板的第一表面上形成连接柱的第一蚀刻掩模; 形成用于在所述金属板的第二表面上形成布线图案的第二蚀刻掩模; 通过从第一表面到金属板的中间进行蚀刻来形成连接柱; 将预糊树脂填充到不存在连接柱的第一表面的一部分; 处理，使得第一表面的连接柱的高度低于围绕连接柱的预制树脂的高度; 以及通过在所述第二表面上进行蚀刻来形成所述布线图案。