公开(公告)号：US20170117290A1

公开(公告)日：2017-04-27

申请号：US15212356

申请日：2016-07-18

申请人： TAE-HEE LEE ,  HONG-SOO KIM ,  KYOUNG-HOON KIM ,  YOUNG-SUK LEE

发明人： TAE-HEE LEE ,  HONG-SOO KIM ,  KYOUNG-HOON KIM ,  YOUNG-SUK LEE

IPC分类号： H01L27/115 ,  G11C16/04 ,  G11C16/08 ,  H01L23/528 ,  H01L23/522

CPC分类号： H01L27/11582 ,  G11C16/0466 ,  G11C16/0483 ,  G11C16/08 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/11568 ,  H01L27/11573 ,  H01L28/00

摘要： A highly integrated semiconductor memory device includes a substrate, a plurality of vertical pillars above the substrate, a plurality of connection lines extending over the vertical pillars, a plurality of lower via plugs provided above the vertical pillars and connecting the vertical pillars to the connection lines, a dummy connection line provided at a same level as the connection lines with respect to a main surface of the substrate, and a dummy via plug connected to a lower surface of the dummy connection line and having a different height than each of the lower via plugs. The vertical pillars, the connection lines, the lower via plugs are provided in a cell region, and the dummy connection line and the dummy via plug are provided in a dummy region.