公开(公告)号：US11848286B2

公开(公告)日：2023-12-19

申请号：US16985353

申请日：2020-08-05

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Yi-Feng Chang

IPC分类号： H01L23/60 ,  H01L23/482 ,  H01L23/522 ,  H01L27/02 ,  H01L21/02

CPC分类号： H01L23/60 ,  H01L23/4824 ,  H01L21/02697 ,  H01L23/522 ,  H01L27/0248

摘要： A semiconductor device includes a substrate and a metallization layer. The substrate has an active region that includes opposite first and second edges. The metallization layer is disposed above the substrate, and includes a pair of metal lines and a metal plate. The metal lines extend from an outer periphery of the active region into the active region and toward the second edge of the active region. The metal plate interconnects the metal lines and at least a portion of which is disposed at the outer periphery of the active region.

公开(公告)号：US11688702B2

公开(公告)日：2023-06-27

申请号：US16985371

申请日：2020-08-05

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Yi-Feng Chang

IPC分类号： H01L23/60 ,  H01L23/482 ,  H01L23/522 ,  H01L27/02 ,  H01L21/02

CPC分类号： H01L23/60 ,  H01L23/4824 ,  H01L21/02697 ,  H01L23/522 ,  H01L27/0248

摘要： A semiconductor device includes a substrate and a metallization layer. The substrate has an active region that includes opposite first and second edges. The metallization layer is disposed above the substrate, and includes a pair of metal lines and a metal plate. The metal lines extend from an outer periphery of the active region into the active region and toward the second edge of the active region. The metal plate interconnects the metal lines and at least a portion of which is disposed at the outer periphery of the active region.

公开(公告)号：US20200373255A1

公开(公告)日：2020-11-26

申请号：US16985371

申请日：2020-08-05

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Yi-Feng Chang

IPC分类号： H01L23/60 ,  H01L23/482

摘要： A semiconductor device includes a substrate and a metallization layer. The substrate has an active region that includes opposite first and second edges. The metallization layer is disposed above the substrate, and includes a pair of metal lines and a metal plate. The metal lines extend from an outer periphery of the active region into the active region and toward the second edge of the active region. The metal plate interconnects the metal lines and at least a portion of which is disposed at the outer periphery of the active region.

公开(公告)号：US20150129971A1

公开(公告)日：2015-05-14

申请号：US14079744

申请日：2013-11-14

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Ming-Hsiang Song ,  Jam-Wem Lee ,  Yi-Feng Chang ,  Wun-Jie Hung Lin

IPC分类号： H01L27/088 ,  H01L29/66

CPC分类号： H01L27/0251 ,  H01L21/26513 ,  H01L21/823437 ,  H01L21/823493 ,  H01L21/823828 ,  H01L21/823871 ,  H01L21/823892 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/0928 ,  H01L29/66477

摘要： A semiconductor arrangement includes a well region and a first region disposed within the well region. The first region includes a first conductivity type. The semiconductor arrangement includes a first gate disposed above the well region on a first side of the first region. The first gate includes a first top surface facing away from the well region. The first top surface has a first top surface area. The semiconductor arrangement includes a first gate contact disposed above the first gate. The first gate contact includes a first bottom surface facing towards the well region. The first bottom surface has a first bottom surface area. The first bottom surface area covers at least about two thirds of the first top surface area.

摘要翻译： 半导体装置包括阱区和设置在阱区内的第一区。 第一区域包括第一导电类型。 半导体装置包括设置在第一区域的第一侧上的阱区上方的第一栅极。 第一门包括面向远离井区的第一顶面。 第一顶表面具有第一顶表面区域。 半导体装置包括设置在第一栅极上方的第一栅极触点。 第一门接触包括面向井区域的第一底面。 第一底表面具有第一底表面区域。 第一底表面区域覆盖第一顶表面区域的至少约三分之二。

公开(公告)号：US20240113044A1

公开(公告)日：2024-04-04

申请号：US18538093

申请日：2023-12-13

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Yi-Feng Chang

IPC分类号： H01L23/60 ,  H01L23/482

CPC分类号： H01L23/60 ,  H01L23/4824 ,  H01L23/522

摘要： A semiconductor device includes a substrate and a metallization layer. The substrate has an active region that includes opposite first and second edges. The metallization layer is disposed above the substrate, and includes a pair of metal lines and a metal plate. The metal lines extend from an outer periphery of the active region into the active region and toward the second edge of the active region. The metal plate interconnects the metal lines and at least a portion of which is disposed at the outer periphery of the active region.

公开(公告)号：US11688701B2

公开(公告)日：2023-06-27

申请号：US16945988

申请日：2020-08-03

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Yi-Feng Chang

IPC分类号： H01L23/60 ,  H01L23/482 ,  H01L23/522 ,  H01L27/02 ,  H01L21/02

CPC分类号： H01L23/60 ,  H01L23/4824 ,  H01L21/02697 ,  H01L23/522 ,  H01L27/0248

摘要： A semiconductor device includes a substrate and a metallization layer. The substrate has an active region that includes opposite first and second edges. The metallization layer is disposed above the substrate, and includes a pair of metal lines and a metal plate. The metal lines extend from an outer periphery of the active region into the active region and toward the second edge of the active region. The metal plate interconnects the metal lines and at least a portion of which is disposed at the outer periphery of the active region.

公开(公告)号：US10734330B2

公开(公告)日：2020-08-04

申请号：US14609498

申请日：2015-01-30

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Yi-Feng Chang

IPC分类号： H01L23/60 ,  H01L23/482 ,  H01L23/522

摘要： A semiconductor device includes a substrate and a metallization layer. The substrate has an active region that includes opposite first and second edges. The metallization layer is disposed above the substrate, and includes a pair of metal lines and a metal plate. The metal lines extend from an outer periphery of the active region into the active region and toward the second edge of the active region. The metal plate interconnects the metal lines and at least a portion of which is disposed at the outer periphery of the active region.

公开(公告)号：US20230290745A1

公开(公告)日：2023-09-14

申请号：US18319575

申请日：2023-05-18

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Yi-Feng Chang

IPC分类号： H01L23/60 ,  H01L23/482

CPC分类号： H01L23/60 ,  H01L23/4824 ,  H01L23/522

摘要： A semiconductor device includes a substrate and a metallization layer. The substrate has an active region that includes opposite first and second edges. The metallization layer is disposed above the substrate, and includes a pair of metal lines and a metal plate. The metal lines extend from an outer periphery of the active region into the active region and toward the second edge of the active region. The metal plate interconnects the metal lines and at least a portion of which is disposed at the outer periphery of the active region.

公开(公告)号：US09978739B2

公开(公告)日：2018-05-22

申请号：US15603516

申请日：2017-05-24

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED

发明人： Ming-Hsiang Song ,  Jam-Wem Lee ,  Yi-Feng Chang ,  Wun-Jie Lin

IPC分类号： H01L27/02 ,  H01L27/092 ,  H01L27/088 ,  H01L21/8238 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/265

CPC分类号： H01L27/0251 ,  H01L21/26513 ,  H01L21/823437 ,  H01L21/823493 ,  H01L21/823828 ,  H01L21/823871 ,  H01L21/823892 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/0928 ,  H01L29/66477

摘要： A semiconductor arrangement includes a well region and a first region disposed within the well region. The first region includes a first conductivity type. The semiconductor arrangement includes a first gate disposed above the well region on a first side of the first region. The first gate includes a first top surface facing away from the well region. The first top surface has a first top surface area. The semiconductor arrangement includes a first gate contact disposed above the first gate. The first gate contact includes a first bottom surface facing towards the well region. The first bottom surface has a first bottom surface area. The first bottom surface area covers at least about two thirds of the first top surface area.

公开(公告)号：US09666575B2

公开(公告)日：2017-05-30

申请号：US14983641

申请日：2015-12-30

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Ming-Hsiang Song ,  Jam-Wem Lee ,  Yi-Feng Chang ,  Wun-Jie Lin

IPC分类号： H01L27/02 ,  H01L27/088 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/265 ,  H01L21/8238 ,  H01L27/092

CPC分类号： H01L27/0251 ,  H01L21/26513 ,  H01L21/823437 ,  H01L21/823493 ,  H01L21/823828 ,  H01L21/823871 ,  H01L21/823892 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/0928 ,  H01L29/66477

摘要： A semiconductor arrangement includes a well region and a first region disposed within the well region. The first region includes a first conductivity type. The semiconductor arrangement includes a first gate disposed above the well region on a first side of the first region. The first gate includes a first top surface facing away from the well region. The first top surface has a first top surface area. The semiconductor arrangement includes a first gate contact disposed above the first gate. The first gate contact includes a first bottom surface facing towards the well region. The first bottom surface has a first bottom surface area. The first bottom surface area covers at least about two thirds of the first top surface area.