公开(公告)号：US12191086B2

公开(公告)日：2025-01-07

申请号：US18114539

申请日：2023-02-27

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Yuji Tsushima ,  Yasuhiro Matsumoto ,  Koichiro Morita

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/248

Abstract: A multilayer ceramic device includes a multilayer chip. The multilayer chip has a capacity section, a side margin and an intermediate portion. The intermediate portion is provided between the capacity section and the side margin. An A/B ratio is larger in the side margin than in the capacity section, and is smaller in the intermediate portion than in the capacity section.

公开(公告)号：US12033798B2

公开(公告)日：2024-07-09

申请号：US17584994

申请日：2022-01-26

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Yasuhiro Matsumoto ,  Koichiro Morita

IPC: H01G4/10 ,  H01G4/008 ,  H01G4/30

CPC classification number: H01G4/10 ,  H01G4/008 ,  H01G4/30

Abstract: A ceramic electronic device includes a multilayer structure in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked. A main component of the plurality of dielectric layers is a ceramic having a perovskite structure of which an A site includes at least Ba and of which an A/B ratio is 0.980 or less. The plurality of internal electrode layers include a co-material. A total amount of Ti, Zr and Hf is 90 mol % or more in metal elements included in the co-material and an amount of Ba is 10 mol % or less in the metal elements.

公开(公告)号：US11004609B2

公开(公告)日：2021-05-11

申请号：US16250848

申请日：2019-01-17

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Kunihiko Nagaoka ,  Noriyuki Chigira ,  Koichiro Morita

IPC: H01G4/30 ,  H01G4/12 ,  H01G4/008

Abstract: A multilayer ceramic capacitor includes: a ceramic multilayer structure having a structure in which each of a plurality of ceramic dielectric layers and each of a plurality of internal electrode layers are alternately stacked and are alternately exposed to two edge faces of the ceramic multilayer structure; and a pair of external electrodes that are formed on the two edge faces, wherein when an average value of insulation resistances of each pair of the internal electrode adjacent to each other in a stacking direction is IRave and a minimum value of the insulation resistances is IRmin, (IRave−IRmin)/IRave

公开(公告)号：US09287046B2

公开(公告)日：2016-03-15

申请号：US14389287

申请日：2012-11-13

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Koichiro Morita ,  Tetsuo Shimura ,  Kunihiko Nagaoka

IPC: H01G4/10 ,  H01G4/12 ,  C04B35/468 ,  H01G4/20 ,  C04B35/64 ,  H01G4/224

CPC classification number: H01G4/20 ,  C04B35/4682 ,  C04B35/64 ,  C04B2235/3206 ,  C04B2235/3224 ,  C04B2235/3225 ,  C04B2235/3239 ,  C04B2235/3244 ,  C04B2235/3262 ,  C04B2235/3418 ,  C04B2235/5445 ,  C04B2235/6025 ,  C04B2235/658 ,  C04B2235/6584 ,  C04B2235/663 ,  C04B2235/781 ,  C04B2235/785 ,  H01G4/10 ,  H01G4/1227 ,  H01G4/1236 ,  H01G4/224

Abstract: A multi-layer ceramic capacitor has a structure where its dielectric layers are constituted by a sintered compact that contains a mol of ReO3/2, b mol of SiO2, c mol of MOx, d mol of ZrO2, and e mol of MgO (where Re is a rare earth element, M is a metal element (except for Ba, Ti, Re, Si, Zr, Mg, and rare earth elements), and x is a valance) per 100 mol of BaTiO3, and a, b, c, d, and e mentioned above which indicate the mol numbers of respective constituents per 100 mol of BaTiO3 are 0.1≦a≦1.0, 0.1≦b≦1.5, 0.1≦c≦0.4, 0≦d≦1.0, and 0≦e≦0.03, respectively.

Abstract translation: 多层陶瓷电容器具有这样的结构，其电介质层由含有ReO 3/2摩尔，SiO 2的b摩尔，MO x的摩尔数，ZrO 2的d摩尔和MgO的e摩尔的烧结体构成 Re是稀土元素，M是每100摩尔BaTiO 3中的金属元素（Ba，Ti，Re，Si，Zr，Mg和稀土元素除外），x是价态），a，b， c，d和e表示每100摩尔BaTiO 3的各组分的摩尔数为0.1和nlE; a＆nlE; 1.0,0.1和nlE; b＆nlE; 1.5,0.1和nlE; c＆nlE; 0.4,0和nlE; d＆nlE; 1.0和 0＆nlE; e＆nlE; 0.03。

公开(公告)号：US11837409B2

公开(公告)日：2023-12-05

申请号：US17590059

申请日：2022-02-01

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Koichiro Morita

IPC: H01G4/12 ,  H01G4/30 ,  H01G4/012 ,  C04B35/468 ,  C04B35/64 ,  H01G4/008 ,  C04B35/06

CPC classification number: H01G4/1227 ,  C04B35/06 ,  C04B35/4682 ,  H01G4/008 ,  H01G4/012 ,  H01G4/30 ,  C04B2235/658

Abstract: A ceramic electronic device includes a plurality of dielectric layers of which a main component is a ceramic having a perovskite structure, and a plurality of internal electrode layers, each of which is stacked through each of the plurality of dielectric layers and includes a co-material which is inactive against the main component of the plurality of dielectric layers.

公开(公告)号：US11823843B2

公开(公告)日：2023-11-21

申请号：US17034915

申请日：2020-09-28

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Koichiro Morita

IPC: H01G4/30 ,  H01G4/008 ,  H01G4/012 ,  H01G4/224 ,  C04B35/64 ,  H01G4/12 ,  C04B35/468

CPC classification number: H01G4/30 ,  C04B35/4682 ,  C04B35/64 ,  H01G4/008 ,  H01G4/012 ,  H01G4/1227 ,  H01G4/224

Abstract: A multilayer ceramic capacitor includes: a multilayer structure in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked. A ceramic protection section includes a cover layer and a side margin. A main component ceramic of the ceramic protection section is a ceramic material having a perovskite structure expressed as a general formula ABO3. An A site of the perovskite structure includes at least Ba. A B site of the perovskite structure includes at least Ti and Zr. A Zr/Ti ratio which is a molar ratio of Zr and Ti is 0.010 or more and 0.25 or less. An A/B ratio which is a molar ratio of the A site and the B site is 0.990 or less.

公开(公告)号：US11776752B2

公开(公告)日：2023-10-03

申请号：US17317608

申请日：2021-05-11

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Yasuhiro Matsumoto ,  Koichiro Morita

IPC: H01G4/12 ,  C04B35/468 ,  H01G4/30 ,  C04B35/626 ,  C04B35/634 ,  C04B35/64

CPC classification number: H01G4/1245 ,  C04B35/4682 ,  C04B35/6261 ,  C04B35/6342 ,  C04B35/64 ,  H01G4/30 ,  C04B2235/3224 ,  C04B2235/3236 ,  C04B2235/3244 ,  C04B2235/442 ,  C04B2235/5454 ,  C04B2235/6025 ,  C04B2235/6562 ,  C04B2235/6567

Abstract: A multilayer ceramic capacitor includes a multilayer structure having a substantially rectangular parallelepiped shape and including dielectric layers and internal electrode layers that are alternately stacked, the dielectric layers being mainly composed of BaTiO3, the internal electrode layers being alternately exposed to two edge faces of the multilayer chip opposite to each other. A Zr/Ti ratio is 0.02 or more and 0.10 or less in a capacity section. A Ba/Ti ratio is more than 0.900 and less than 1.010 in the capacity section. A Eu/Ti ratio is 0.005 or more and 0.05 or less in the capacity section. A Mn/Ti ratio is 0.0005 or more and 0.05 or less in the capacity section. A total amount of a rare earth element or rare earth elements is less than the amount of Eu.

公开(公告)号：US10431383B2

公开(公告)日：2019-10-01

申请号：US15456991

申请日：2017-03-13

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Koichiro Morita ,  Katsuya Taniguchi ,  Minoru Ryu ,  Yoshiki Iwazaki

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/12 ,  H01G4/232

Abstract: A multilayer ceramic capacitor includes: a pair of external electrodes; a first internal electrode containing a base metal and coupled to one of the pair external electrodes; a dielectric layer stacked on the first internal electrode and containing a ceramic material and the base metal; and a second internal electrode stacked on the dielectric layer, containing the base metal, and coupled to another one of the external electrodes, wherein a concentration of the base metal in each of five regions, which are equally divided regions of a region between locations 50 nm away from the first and second internal electrodes in a stacking direction between the first and second internal electrodes, is within ±20% of an average of the concentrations of the base metal in the five regions, and thicknesses of the first internal electrode and the second internal electrode are 0.2 μm or greater.

公开(公告)号：US10163569B2

公开(公告)日：2018-12-25

申请号：US15456962

申请日：2017-03-13

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Koichiro Morita ,  Minoru Ryu ,  Katsuya Taniguchi ,  Yoshiki Iwazaki

IPC: H01G4/30 ,  H01G4/232 ,  H01G4/012 ,  H01G4/12

Abstract: A multilayer ceramic capacitor includes: a pair of external electrodes; a first internal electrode containing a base metal and coupled to one of the external electrodes; a dielectric layer stacked on the first internal electrode and containing a ceramic material and the base metal; and a second internal electrode stacked on the dielectric layer, containing the base metal, and coupled to another one of the external electrodes, wherein a concentration of the base metal in each of five regions is within ±20% of an average of the concentrations of the base metal in the five regions, the five regions being obtained by dividing a region from a location 50 nm away from the first internal electrode of the dielectric layer to a location 50 nm away from the second internal electrode of the dielectric layer in a stacking direction between the first and second internal electrodes equally into five.

公开(公告)号：US09679698B2

公开(公告)日：2017-06-13

申请号：US14389296

申请日：2012-11-13

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Koichiro Morita ,  Tetsuo Shimura

IPC: H01G4/06 ,  C04B35/00 ,  H01G4/12 ,  H01G4/012 ,  H01G4/248 ,  H01G4/30 ,  C04B35/468 ,  C04B35/465

CPC classification number: H01G4/1227 ,  C04B35/465 ,  C04B35/4682 ,  C04B2235/3206 ,  C04B2235/3224 ,  C04B2235/3236 ,  C04B2235/3239 ,  C04B2235/3244 ,  C04B2235/3262 ,  C04B2235/3418 ,  C04B2235/5445 ,  C04B2235/5454 ,  C04B2235/6584 ,  C04B2235/72 ,  C04B2235/784 ,  C04B2235/785 ,  H01G4/012 ,  H01G4/1209 ,  H01G4/248 ,  H01G4/30

Abstract: A multi-layer ceramic capacitor has a structure where the dispersion, nd, of average grain size of the dielectric grains constituting the dielectric layer (a value (D90/D10) obtained by dividing D90 which is a grain size including 90% cumulative abundance of grains by D10 which is a grain size including 10% cumulative abundance of grains) is smaller than 4.