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公开(公告)号:US20210391866A1
公开(公告)日:2021-12-16
申请号:US17128791
申请日:2020-12-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Srinivas THEERTHAM , Jagdish CHAND , Yogesh DARWHEKAR , Subhashish MUKHERJEE , Jayawardan JANARDHANAN , Uday Kiran MEDA , Arpan Sureshbhai THAKKAR , Apoorva BHATIA , Pranav KUMAR
Abstract: A frequency synthesizer includes a phase-locked loop (PLL). The PLL includes a first voltage-controlled oscillator (VCO) and a second VCO, each comprising an oscillator, a capacitor bank, and a bias circuit. The capacitor bank is configured to selectably adjust an output frequency of the oscillator. The bias circuit is configured to provide a bias current to the oscillator, and includes a current digital-to-analog converter (IDAC), and an amplifier coupled to the IDAC and configured to drive the oscillator.