公开(公告)号：US11563378B2

公开(公告)日：2023-01-24

申请号：US17000854

申请日：2020-08-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Julian Becker ,  Christian Harder ,  Eduardas Jodka ,  Stefan Dietrich ,  Puneet Sareen

IPC: H02M1/08 ,  H02M3/156 ,  G05F1/46 ,  H02M3/158 ,  H03K5/24 ,  G05F3/26 ,  G01R19/165 ,  H02M1/14 ,  H02M1/00 ,  G05F1/575

Abstract: A converter operable to convert an input voltage at an input node to an output voltage at an output node coupled to a load by switching on and off a transistor at a switching frequency, the converter comprising: an error amplifier circuit having a first input coupled to a reference voltage, a second input coupled to the output node through a resistive divider, a first output operable to output a control current and a second output operable to output a current equivalent to the control current; a peak current comparator circuit having a first input coupled to the second output of the error amplifier circuit, a second input and an output, the second input is coupled to the input node through an inductor; an off-time timer circuit having an input coupled to the first output of the error amplifier circuit and an output, the off-time timer circuit operable to set the switching frequency based on the control current; and a control circuit having a first input coupled to the output of the peak current comparator circuit, a second input coupled to the output of the off-time timer circuit and an output coupled to a control terminal of the transistor.

公开(公告)号：US11196339B1

公开(公告)日：2021-12-07

申请号：US17123195

申请日：2020-12-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Eduardas Jodka ,  Julian Becker Ferreira ,  Christian Harder ,  Florian Schimkat

IPC: H02M1/08 ,  H02M3/07 ,  H03K17/687

Abstract: A switching converter having a voltage input, a voltage output and a transistor connected between the voltage input and the voltage output, the switching converter including a control circuit comprising: a gate driver having an input, a first voltage supply input, a second voltage supply input and an output operable to be connected to a control terminal of the transistor; a bootstrap capacitor connected between the first voltage supply input and the second voltage supply input; and a charge pump having an input operable to be connected to the voltage input and an output connected to the first voltage supply input.

公开(公告)号：US20200251976A1

公开(公告)日：2020-08-06

申请号：US16265478

申请日：2019-02-01

Applicant: Texas Instruments Incorporated

Inventor： Eduardas Jodka ,  Julian Becker ,  Carsten Stoerk

IPC: H02M1/08 ,  H02M3/155 ,  H03K17/687

Abstract: A gate driver for a high-side NMOS power transistor in a DC/DC boost converter includes first and second switches coupled in series between an output pin and the gate of the high-side transistor. A third switch is coupled between the gate and a switch-node between the high-side and low-side transistors, the switch node also being coupled to an input pin. Fourth and fifth switches are coupled in series between the output pin and a clamp pin. Sixth and seventh switch are coupled in series between the output pin and a ground pin. First and second bootstrap capacitors have respective first terminals coupled to a first node between the first and second switches. The first capacitor has a second terminal coupled to a node between the fourth and fifth switches; the second capacitor has a second terminal coupled to a node between the sixth and seventh switches.

公开(公告)号：US10784764B2

公开(公告)日：2020-09-22

申请号：US16265478

申请日：2019-02-01

Applicant: Texas Instruments Incorporated

Inventor： Eduardas Jodka ,  Julian Becker ,  Carsten Stoerk

IPC: H03K99/00 ,  H02M1/08 ,  H02M3/155 ,  H03K17/687 ,  H02M1/00

Abstract: A gate driver for a high-side NMOS power transistor in a DC/DC boost converter includes first and second switches coupled in series between an output pin and the gate of the high-side transistor. A third switch is coupled between the gate and a switch-node between the high-side and low-side transistors, the switch node also being coupled to an input pin. Fourth and fifth switches are coupled in series between the output pin and a clamp pin. Sixth and seventh switch are coupled in series between the output pin and a ground pin. First and second bootstrap capacitors have respective first terminals coupled to a first node between the first and second switches. The first capacitor has a second terminal coupled to a node between the fourth and fifth switches; the second capacitor has a second terminal coupled to a node between the sixth and seventh switches.

公开(公告)号：US11056966B2

公开(公告)日：2021-07-06

申请号：US16996259

申请日：2020-08-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Eduardas Jodka ,  Julian Becker ,  Carsten Stoerk

IPC: H03K99/00 ,  H02M1/08 ,  H03K17/687 ,  H02M3/155 ,  H02M1/00

Abstract: A gate driver for a high-side NMOS power transistor in a DC/DC boost converter includes first and second switches coupled in series between an output pin and the gate of the high-side transistor. A third switch is coupled between the gate and a switch-node between the high-side and low-side transistors, the switch node also being coupled to an input pin. Fourth and fifth switches are coupled in series between the output pin and a clamp pin. Sixth and seventh switch are coupled in series between the output pin and a ground pin. First and second bootstrap capacitors have respective first terminals coupled to a first node between the first and second switches. The first capacitor has a second terminal coupled to a node between the fourth and fifth switches; the second capacitor has a second terminal coupled to a node between the sixth and seventh switches.

公开(公告)号：US20210083583A1

公开(公告)日：2021-03-18

申请号：US17000854

申请日：2020-08-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Julian Becker ,  Christian Harder ,  Eduardas Jodka ,  Stefan Dietrich ,  Puneet Sareen

IPC: H02M3/158 ,  H03K5/24 ,  H02M1/14 ,  G05F3/26 ,  G01R19/165

Abstract: A converter operable to convert an input voltage at an input node to an output voltage at an output node coupled to a load by switching on and off a transistor at a switching frequency, the converter comprising: an error amplifier circuit having a first input coupled to a reference voltage, a second input coupled to the output node through a resistive divider, a first output operable to output a control current and a second output operable to output a current equivalent to the control current; a peak current comparator circuit having a first input coupled to the second output of the error amplifier circuit, a second input and an output, the second input is coupled to the input node through an inductor; an off-time timer circuit having an input coupled to the first output of the error amplifier circuit and an output, the off-time timer circuit operable to set the switching frequency based on the control current; and a control circuit having a first input coupled to the output of the peak current comparator circuit, a second input coupled to the output of the off-time timer circuit and an output coupled to a control terminal of the transistor.

公开(公告)号：US11804769B2

公开(公告)日：2023-10-31

申请号：US17138603

申请日：2020-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Eduardas Jodka ,  Gaetano Maria Walter Petrina ,  Manuel Wiersch

IPC: H02M1/08 ,  H02M1/44 ,  H03K17/687 ,  H03K17/16

CPC classification number: H02M1/08 ,  H02M1/44 ,  H03K17/161 ,  H03K17/687

Abstract: In some examples, an apparatus includes a driver having a driver output, a capacitor having a first plate and a second plate, the first plate coupled to the driver output, and a transistor having a transistor gate, a transistor source, and a transistor drain. The apparatus also includes a first switch coupled between the second plate and the transistor gate, a second switch coupled between the second plate and the transistor drain, and a third switch coupled between the transistor gate and the transistor drain.

公开(公告)号：US20200381990A1

公开(公告)日：2020-12-03

申请号：US16996259

申请日：2020-08-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Eduardas Jodka ,  Julian Becker ,  Carsten Stoerk

IPC: H02M1/08 ,  H02M3/155 ,  H03K17/687

Abstract: A gate driver for a high-side NMOS power transistor in a DC/DC boost converter includes first and second switches coupled in series between an output pin and the gate of the high-side transistor. A third switch is coupled between the gate and a switch-node between the high-side and low-side transistors, the switch node also being coupled to an input pin. Fourth and fifth switches are coupled in series between the output pin and a clamp pin. Sixth and seventh switch are coupled in series between the output pin and a ground pin. First and second bootstrap capacitors have respective first terminals coupled to a first node between the first and second switches. The first capacitor has a second terminal coupled to a node between the fourth and fifth switches; the second capacitor has a second terminal coupled to a node between the sixth and seventh switches.

公开(公告)号：US10673337B1

公开(公告)日：2020-06-02

申请号：US16265027

申请日：2019-02-01

Applicant: Texas Instruments Incorporated

Inventor： Eduardas Jodka ,  Julian Becker ,  Stefan Dietrich

IPC: H02M3/158 ,  H02M1/08 ,  H02M1/088 ,  H02M1/38 ,  H02M3/156 ,  H02M1/00

Abstract: A switch-node rising edge detection circuit is provided for a switched-mode DC/DC boost converter. A high-side gate-driver couples a gate of the high-side NMOS power transistor to either a first terminal of a bootstrap capacitor or the switch-node. The detection circuit includes an AND gate that receives an activation signal on a first input and provides a switching signal to the high-side gate-driver. A PMOS transistor is coupled in series with an inverter between the first terminal of the bootstrap capacitor and a second input of the AND gate. The inverter receives supply voltages from the first terminal of the bootstrap capacitor and the switch-node. The gate of the PMOS transistor receives the activation signal. An NMOS transistor is coupled between an output voltage and a node between the PMOS transistor and the inverter. A gate of the NMOS transistor is coupled to the bootstrap capacitor's first terminal.