公开(公告)号：US20190123556A1

公开(公告)日：2019-04-25

申请号：US16027914

申请日：2018-07-05

Applicant: Texas Instruments Incorporated

Inventor： Zhao Fang ,  Emmanuel Osei Boakye ,  Mark Benjamin Welty ,  Eddie W. Yu

IPC: H02H9/04 ,  H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L29/417 ,  H01L29/866 ,  H01L27/02

Abstract: A surge protection device for providing bidirectional detections of one or more surge events. The device has low dynamic resistance during a surge protection mode, and it conducts ultra-low leakage current outside of the surge protection mode. In one implementation, the device includes first and second power transistors, a sensing circuit, and a driver circuit. The first power transistor includes a first source terminal that is coupled to the substrate, and the second power transistor includes a second source terminal that is coupled to the substrate. The sensing circuit is configured to detect a voltage of the first pin relative to the second pin and generate a sense signal when the voltage exceeds a threshold. The driver circuit is configured to generate a driver signal based on the sense signal and output the driver signal to at least one of the first or second gate terminal.

公开(公告)号：US11196250B2

公开(公告)日：2021-12-07

申请号：US16027914

申请日：2018-07-05

Applicant: Texas Instruments Incorporated

Inventor： Zhao Fang ,  Emmanuel Osei Boakye ,  Mark Benjamin Welty ,  Eddie W. Yu

IPC: H02H9/04 ,  H01L29/08 ,  H01L27/02 ,  H01L29/417 ,  H01L29/866 ,  H01L29/10 ,  H01L29/78

Abstract: A surge protection device for providing bidirectional detections of one or more surge events. The device has low dynamic resistance during a surge protection mode, and it conducts ultra-low leakage current outside of the surge protection mode. In one implementation, the device includes first and second power transistors, a sensing circuit, and a driver circuit. The first power transistor includes a first source terminal that is coupled to the substrate, and the second power transistor includes a second source terminal that is coupled to the substrate. The sensing circuit is configured to detect a voltage of the first pin relative to the second pin and generate a sense signal when the voltage exceeds a threshold. The driver circuit is configured to generate a driver signal based on the sense signal and output the driver signal to at least one of the first or second gate terminal.

公开(公告)号：US20170047731A1

公开(公告)日：2017-02-16

申请号：US15232521

申请日：2016-08-09

Applicant: Texas Instruments Incorporated

Inventor： Sujan Kundapur Manohar ,  Roland Karl Son ,  Juergen Luebbe ,  Eddie W. Yu

IPC: H02H9/02 ,  H03K5/08 ,  H03K17/687

CPC classification number: H03K5/08 ,  H02H3/08 ,  H02H3/087 ,  H02H3/18 ,  H02H9/02 ,  H03K17/08122 ,  H03K17/0822

Abstract: In described examples, a power interface subsystem includes power transistors, each having: a conduction path coupled between a battery terminal and an accessory terminal; and a control terminal. A differential amplifier has: a first input coupled to the battery terminal; a second input coupled to the accessory terminal; and an output node. An offset voltage source is coupled to cause an offset of a selected polarity at one of the inputs to the differential amplifier. The offset has a first polarity in a first operating mode and a second polarity in a second operating mode. Gate control circuitry is coupled to apply a control level at the control terminal(s) of selected one(s) of the power transistors responsive to a voltage at the output node, and to apply an off-state control level to the control terminal(s) of unselected one(s) of the power transistors.

Abstract translation: 在所述示例中，电源接口子系统包括功率晶体管，每个功率晶体管具有：耦合在电池端子和附件端子之间的导电路径; 和控制终端。 差分放大器具有：耦合到电池端子的第一输入; 耦合到附件终端的第二输入; 和输出节点。 偏移电压源被耦合以在所述差分放大器的输入之一处引起所选极性的偏移。 偏移在第一操作模式中具有第一极性，在第二操作模式中具有第二极性。 门控制电路被耦合以响应于输出节点处的电压而在功率晶体管的所选择的一个或多个控制端上施加控制电平，并且向控制端施加截止状态控制电平（ s）的未选择的一个或多个功率晶体管。

公开(公告)号：US10979037B2

公开(公告)日：2021-04-13

申请号：US16167151

申请日：2018-10-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sujan Kundapur Manohar ,  Roland Karl Son ,  Juergen Luebbe ,  Eddie W. Yu

IPC: H02H3/087 ,  H03K5/08 ,  H03K17/0812 ,  H02H3/18 ,  H02H3/08 ,  H03K17/082 ,  H02H9/02 ,  H02H3/44

Abstract: In described examples, a power interface subsystem includes power transistors, each having: a conduction path coupled between a battery terminal and an accessory terminal; and a control terminal. A differential amplifier has: a first input coupled to the battery terminal; a second input coupled to the accessory terminal; and an output node. An offset voltage source is coupled to cause an offset of a selected polarity at one of the inputs to the differential amplifier. The offset has a first polarity in a first operating mode and a second polarity in a second operating mode. Gate control circuitry is coupled to apply a control level at the control terminal(s) of selected one(s) of the power transistors responsive to a voltage at the output node, and to apply an off-state control level to the control terminal(s) of unselected one(s) of the power transistors.

公开(公告)号：US20190058463A1

公开(公告)日：2019-02-21

申请号：US16167151

申请日：2018-10-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sujan Kundapur Manohar ,  Roland Karl Son ,  Juergen Luebbe ,  Eddie W. Yu

IPC: H03K5/08 ,  H03K17/0812 ,  H02H3/18 ,  H02H3/087 ,  H02H3/08 ,  H03K17/082 ,  H02H9/02

Abstract: In described examples, a power interface subsystem includes power transistors, each having: a conduction path coupled between a battery terminal and an accessory terminal; and a control terminal. A differential amplifier has: a first input coupled to the battery terminal; a second input coupled to the accessory terminal; and an output node. An offset voltage source is coupled to cause an offset of a selected polarity at one of the inputs to the differential amplifier. The offset has a first polarity in a first operating mode and a second polarity in a second operating mode. Gate control circuitry is coupled to apply a control level at the control terminal(s) of selected one(s) of the power transistors responsive to a voltage at the output node, and to apply an off-state control level to the control terminal(s) of unselected one(s) of the power transistors.

公开(公告)号：US10116291B2

公开(公告)日：2018-10-30

申请号：US15232521

申请日：2016-08-09

Applicant: Texas Instruments Incorporated

Inventor： Sujan Kundapur Manohar ,  Roland Karl Son ,  Juergen Luebbe ,  Eddie W. Yu

IPC: H02H3/00 ,  H03K5/08 ,  H03K17/0812 ,  H02H3/18 ,  H02H3/08 ,  H03K17/082 ,  H02H9/02 ,  H02H3/087

Abstract: In described examples, a power interface subsystem includes power transistors, each having: a conduction path coupled between a battery terminal and an accessory terminal; and a control terminal. A differential amplifier has: a first input coupled to the battery terminal; a second input coupled to the accessory terminal; and an output node. An offset voltage source is coupled to cause an offset of a selected polarity at one of the inputs to the differential amplifier. The offset has a first polarity in a first operating mode and a second polarity in a second operating mode. Gate control circuitry is coupled to apply a control level at the control terminal(s) of selected one(s) of the power transistors responsive to a voltage at the output node, and to apply an off-state control level to the control terminal(s) of unselected one(s) of the power transistors.