公开(公告)号：US09240801B2

公开(公告)日：2016-01-19

申请号：US14211233

申请日：2014-03-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jan-Tore Marienborg ,  Gregory Arndt ,  Stefan Dannenberger

IPC: H03M3/00 ,  H03M1/00 ,  H03M1/12

CPC classification number: H03M3/424 ,  H03M1/00 ,  H03M1/12 ,  H03M1/56 ,  H03M1/822 ,  H03M3/30 ,  H03M3/438

Abstract: A delta sigma analog-to-digital converter (ADC) providing optimized performance and energy consumption. In one embodiment, a delta-sigma ADC includes a loop filter and a multi-bit quantizer. The multi-bit quantizer is coupled to the loop filter. The quantizer includes a counter, a reference voltage generator, and a comparator. The counter is configured to provide a multi-bit output value that estimates an output of the loop filter. The reference voltage generator is configured to generate a reference voltage ramp based on the output value of the counter. The comparator is coupled to the reference voltage generator to compare the reference voltage ramp to output of the loop filter.

Abstract translation: 提供优化的性能和能耗的Δ-Σ模数转换器（ADC）。 在一个实施例中，Δ-ΣADC包括环路滤波器和多位量化器。 多位量化器耦合到环路滤波器。 量化器包括计数器，参考电压发生器和比较器。 计数器被配置为提供估计环路滤波器的输出的多位输出值。 参考电压发生器被配置为基于计数器的输出值产生参考电压斜坡。 比较器耦合到参考电压发生器，以将参考电压斜坡与环路滤波器的输出进行比较。

公开(公告)号：US20150263759A1

公开(公告)日：2015-09-17

申请号：US14211233

申请日：2014-03-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jan-Tore Marienborg ,  Gregory Arndt ,  Stefan Dannenberger

IPC: H03M3/00

CPC classification number: H03M3/424 ,  H03M1/00 ,  H03M1/12 ,  H03M1/56 ,  H03M1/822 ,  H03M3/30 ,  H03M3/438

Abstract: A delta sigma analog-to-digital converter (ADC) providing optimized performance and energy consumption. In one embodiment, a delta-sigma ADC includes a loop filter and a multi-bit quantizer. The multi-bit quantizer is coupled to the loop filter. The quantizer includes a counter, a reference voltage generator, and a comparator. The counter is configured to provide a multi-bit output value that estimates an output of the loop filter. The reference voltage generator is configured to generate a reference voltage ramp based on the output value of the counter. The comparator is coupled to the reference voltage generator to compare the reference voltage ramp to output of the loop filter.

Abstract translation: 提供优化的性能和能耗的Δ-Σ模数转换器（ADC）。 在一个实施例中，Δ-ΣADC包括环路滤波器和多位量化器。 多位量化器耦合到环路滤波器。 量化器包括计数器，参考电压发生器和比较器。 计数器被配置为提供估计环路滤波器的输出的多位输出值。 参考电压发生器被配置为基于计数器的输出值产生参考电压斜坡。 比较器耦合到参考电压发生器，以将参考电压斜坡与环路滤波器的输出进行比较。