公开(公告)号：US20210343860A1

公开(公告)日：2021-11-04

申请号：US17375598

申请日：2021-07-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Alexei SADOVNIKOV ,  Natalia LAVROVSKAYA

IPC: H01L29/739 ,  H01L29/66 ,  H01L21/265 ,  H01L21/768 ,  H01L29/45 ,  H01L21/02 ,  H01L29/49 ,  H01L21/311 ,  H01L29/08 ,  H01L21/324

Abstract: An integrated circuit includes a transistor that has an collector region, a base region laterally surrounded by the collector region, and an emitter region laterally surrounded by the base region. A silicide layer on the emitter region is laterally spaced apart from the base region by an unsilicided ring. The emitter region is laterally spaced apart from a base contact region that may be covered by a dielectric layer such as a gate oxide layer.

公开(公告)号：US20190207017A1

公开(公告)日：2019-07-04

申请号：US15859292

申请日：2017-12-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Alexei SADOVNIKOV ,  Natalia LAVROVSKAYA

IPC: H01L29/739 ,  H01L29/66 ,  H01L21/265 ,  H01L21/768 ,  H01L21/324 ,  H01L21/02 ,  H01L29/49 ,  H01L21/311 ,  H01L29/08 ,  H01L29/45

CPC classification number: H01L29/7393 ,  H01L21/02164 ,  H01L21/26513 ,  H01L21/31105 ,  H01L21/324 ,  H01L21/76889 ,  H01L29/0808 ,  H01L29/45 ,  H01L29/4916 ,  H01L29/66325

Abstract: A method to fabricate a transistor, the method comprising: implanting dopants in a semiconductor to form a collector region having majority carriers of a first type; implanting dopants with a first dosage and implanting dopants with a second dosage in the collector region to form a base region having majority carriers of a second type, wherein the second dosage is at a lower energy than the first dosage; forming a gate oxide on the base region; forming a gate material on the gate oxide; forming the gate material and the gate oxide to leave uncovered an emitter area of the base region; and implanting dopants in the emitter area to form an emitter region having majority carriers of the first type.

公开(公告)号：US20230411501A1

公开(公告)日：2023-12-21

申请号：US18242919

申请日：2023-09-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Alexei SADOVNIKOV ,  Natalia LAVROVSKAYA

IPC: H01L29/739 ,  H01L29/66 ,  H01L21/265 ,  H01L21/768 ,  H01L29/45 ,  H01L21/02 ,  H01L29/49 ,  H01L21/311 ,  H01L29/08 ,  H01L21/324

CPC classification number: H01L29/7393 ,  H01L29/66325 ,  H01L21/26513 ,  H01L21/76889 ,  H01L29/45 ,  H01L21/02164 ,  H01L29/4916 ,  H01L21/31105 ,  H01L29/0808 ,  H01L21/324

Abstract: An integrated circuit includes a transistor that has an collector region, a base region laterally surrounded by the collector region, and an emitter region laterally surrounded by the base region. A silicide layer on the emitter region is laterally spaced apart from the base region by an unsilicided ring. The emitter region is laterally spaced apart from a base contact region that may be covered by a dielectric layer such as a gate oxide layer.

公开(公告)号：US20190165129A1

公开(公告)日：2019-05-30

申请号：US15824665

申请日：2017-11-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Alexei SADOVNIKOV ,  Natalia LAVROVSKAYA

IPC: H01L29/66 ,  H01L29/739

Abstract: A method to fabricate a transistor includes implanting dopants in a semiconductor to form a collector region having majority carriers of a first type, implanting dopants in the collector region to form a base region, forming a gate oxide on the base region, forming a gate material on the gate oxide, forming the gate material and the gate oxide to leave uncovered an emitter area of the base region, forming an emitter region, and forming a dielectric to cover a first area of the emitter region and a first sidewall of the gate material and the gate oxide while leaving uncovered a second area of the emitter region. Metal is deposited over the dielectric and the second area of the emitter region, and the semiconductor is annealed to form silicide in the second area of the emitter region.