MIXED SIGNAL CIRCUIT SPUR CANCELLATION
    1.
    发明申请

    公开(公告)号:US20200177168A1

    公开(公告)日:2020-06-04

    申请号:US16396873

    申请日:2019-04-29

    Abstract: A spur cancellation circuit for use in a mixed signal circuit. A spur cancellation circuit includes a clock generation circuit, a flip-flop bank, and a control circuit. The clock generation circuit is configured to generate a clock signal. The flip-flop bank is coupled to the clock generation circuit, and includes a plurality of flip-flops configured to be clocked by the clock signal. The control circuit is coupled to the clock generation circuit and the flip-flop bank. The control circuit is configured to individually enable one or more of the flip-flops to change state responsive to the clock signal and consume a predetermined amount of power; and to provide a data value to be clocked into the flip-flops.

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