PULSE WIDTH MODULATION TECHNIQUE WITH TIME-RATIO DUTY CYCLE COMPUTATION

    公开(公告)号:US20190123725A1

    公开(公告)日:2019-04-25

    申请号:US15791026

    申请日:2017-10-23

    CPC classification number: H03K3/017 H03K4/08 H03K5/24 H03K7/08 H03K21/08

    Abstract: An analog signal-to-pulse width modulation (PWM) converter includes a ramp generator generating a ramp signal and a comparator circuit comparing the ramp signal to a first voltage, a second voltage, and an analog input signal. A duty cycle calculation circuit generates a first control signal to the ramp generator to generate the ramp signal. Based on signals from the comparator circuit, the duty cycle calculation circuit calculates the ratio of the time it takes for the ramp signal to exceed the analog input signal from when the ramp signal exceeds the first voltage to the time it takes for the ramp signal to exceed the second voltage from when the ramp signal exceeds the first voltage. A PWM signal generator generates a PWM output signal based on the ratio calculated by the duty cycle calculation circuit.

    MULTI-SLAVE SERIAL COMMUNICATION
    2.
    发明申请

    公开(公告)号:US20190188174A1

    公开(公告)日:2019-06-20

    申请号:US15985284

    申请日:2018-05-21

    CPC classification number: G06F13/405 G06F1/08 G06F13/423 G06F13/4291

    Abstract: A method for synchronous serial communication includes encoding, by a master device, a header field to be initially transmitted in a frame with a header identification code and a slave count value that defines a number of slave devices communicatively coupled to the master device. A plurality of address fields to be transmitted in the frame are also encoded by the master device. Each of the address fields corresponding to a different one the slave devices. A first of the address fields to be transmitted in the frame corresponds to a last of the slave devices to receive the header field, and a last of the address fields to be transmitted in the frame corresponds to a first of the slave devices to receive the header field. The frame is transmitted to the slave devices by the master device.

    PULSE WIDTH MODULATION TECHNIQUE WITH TIME-RATIO DUTY CYCLE COMPUTATION

    公开(公告)号:US20200304109A1

    公开(公告)日:2020-09-24

    申请号:US16896902

    申请日:2020-06-09

    Abstract: An analog signal-to-pulse width modulation (PWM) converter includes a ramp generator generating a ramp signal and a comparator circuit comparing the ramp signal to a first voltage, a second voltage, and to an analog input signal. A duty cycle calculation circuit generates a first control signal to the ramp generator to generate the ramp signal. Based on signals from the comparator circuit, the duty cycle calculation circuit calculates the ratio of the time it takes for the ramp signal to exceed the analog input signal from when the ramp signal exceeds the first voltage to the time it takes for the ramp signal to exceed the second voltage from when the ramp signal exceeds the first voltage. A PWM signal generator generates a PWM output signal based on the ratio calculated by the duty cycle calculation circuit.

    TRANSISTOR RINGING ADJUSTMENT CIRCUIT AND METHOD

    公开(公告)号:US20200177179A1

    公开(公告)日:2020-06-04

    申请号:US16205576

    申请日:2018-11-30

    Abstract: A transistor, e.g., field effect transistor FET, ringing adjustment circuit and method comprising the measuring of a voltage from a transistor (e.g., a node of a FET) during the transistor turning on and turning off, determining the voltage oscillation in the measured voltage by performing a derivative function on the measured voltage and detecting a switch in a voltage change rate from positive to negative or negative to positive, and comparing the voltage change rate after the detected switch to adjust drive current applied to the transistor to optimize efficiency while minimizing voltage oscillation and ringing.

    MOTOR DRIVE SWITCH CONTROL WITH ADAPTIVE SLEW RATE MONITORING

    公开(公告)号:US20200153429A1

    公开(公告)日:2020-05-14

    申请号:US16190784

    申请日:2018-11-14

    Abstract: An electronic circuit includes a first switch driver, a second switch driver, and a switch node coupled to the first and second switch drivers, and configured to couple to a motor. The electronic circuit also includes slew rate measurement circuitry coupled to the switch node and configured to measure a slew rate of switching operations at the switch node. The electronic circuit also includes a controller coupled to the first switch driver, to the second switch driver, and to the slew rate measurement circuitry, and configured to compare a measured slew rate provided by the slew rate measurement circuitry with a target slew rate, and to selectively adjust control signals to at least one of the first and second switch drivers based on a comparison result. The first and second switch drivers are configured to drive switches to power the motor based on the control signals.

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