公开(公告)号：US20190318983A1

公开(公告)日：2019-10-17

申请号：US16455583

申请日：2019-06-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Manu A. Prakuzhy ,  Siva P. Gurrum ,  Daryl R. Heussner ,  Stefan W. Wiktor ,  Ken Pham

IPC: H01L23/495 ,  H02M3/158 ,  H01L23/31

Abstract: A semiconductor device that has at least one semiconductor chip attached to a leadframe made of sheet metal of unencumbered full thickness. The leadframe has leads of a first subset that alternate with leads of a second subset. The leads of the first and second subsets have elongated straight lead portions that are parallel to each other in a planar array. A cover layer of insulating material is located over portions of un-encapsulated lead surfaces. The portions of the leads of the first and second subsets that don't have the cover layer have a metallurgical configuration that creates an affinity for solder wetting.

公开(公告)号：US11430719B2

公开(公告)日：2022-08-30

申请号：US16455583

申请日：2019-06-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Manu A. Prakuzhy ,  Siva P. Gurrum ,  Daryl R. Heussner ,  Stefan W. Wiktor ,  Ken Pham

IPC: H01L23/495 ,  H01L23/31 ,  H02M3/158

Abstract: A semiconductor device that has at least one semiconductor chip attached to a leadframe made of sheet metal of unencumbered full thickness. The leadframe has leads of a first subset that alternate with leads of a second subset. The leads of the first and second subsets have elongated straight lead portions that are parallel to each other in a planar array. A cover layer of insulating material is located over portions of un-encapsulated lead surfaces. The portions of the leads of the first and second subsets that don't have the cover layer have a metallurgical configuration that creates an affinity for solder wetting.

公开(公告)号：US10607927B2

公开(公告)日：2020-03-31

申请号：US15487186

申请日：2017-04-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Manu J. Prakuzhy ,  Siva P. Gurrum ,  Daryl R. Heussner ,  Stefan W. Wiktor ,  Ken Pham

IPC: H01L23/495 ,  H01L23/31 ,  H02M3/158

Abstract: A semiconductor device that has at least one semiconductor chip attached to a leadframe made of sheet metal of unencumbered full thickness. The leadframe has leads of a first subset that alternate with leads of a second subset. The leads of the first and second subsets have elongated straight lead portions that are parallel to each other in a planar array. A cover layer of insulating material is located over portions of un-encapsulated lead surfaces. The portions of the leads of the first and second subsets that don't have the cover layer have a metallurgical configuration that creates an affinity for solder wetting.

公开(公告)号：US20180076116A1

公开(公告)日：2018-03-15

申请号：US15487186

申请日：2017-04-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Manu J. Prakuzhy ,  Siva P. Gurrum ,  Daryl R. Heussner ,  Stefan W. Wiktor ,  Ken Pham

IPC: H01L23/495 ,  H01L23/31 ,  H02M3/158

CPC classification number: H01L23/49558 ,  H01L23/3114 ,  H01L23/49503 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49582 ,  H01L23/49586 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/1032 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/1037 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H02M3/158

Abstract: A semiconductor device that has at least one semiconductor chip attached to a leadframe made of sheet metal of unencumbered full thickness. The leadframe has leads of a first subset that alternate with leads of a second subset. The leads of the first and second subsets have elongated straight lead portions that are parallel to each other in a planar array. A cover layer of insulating material is located over portions of un-encapsulated lead surfaces. The portions of the leads of the first and second subsets that don't have the cover layer have a metallurgical configuration that creates an affinity for solder wetting.