公开(公告)号：US20190371368A1

公开(公告)日：2019-12-05

申请号：US16283651

申请日：2019-02-22

Applicant: Toshiba Memory Corporation

Inventor： Atsushi KAWASUMI

IPC: G11C5/14 ,  G11C5/06 ,  G11C5/02

Abstract: A semiconductor storage device includes first wiring lines extending in a first direction, second wiring lines extending in a second direction, memory cells at intersections of the first and second wiring lines, a selection unit configured to concurrently select, as selected memory cells, at least two memory cells of a plurality of memory cells that are between one of the first wiring lines and one of the second wiring lines and divided into a plurality of contiguous sections along the first wiring line, and a driver that applies a voltage to selected memory cells through the first and second wiring lines. The at least two memory cells are located in the same section and the driver applies a first voltage if the selected memory cells are in a first section and a second voltage, different from the first voltage, if the selected memory cells are in a second section.

公开(公告)号：US20190287616A1

公开(公告)日：2019-09-19

申请号：US16120410

申请日：2018-09-03

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Takaaki NAKAZATO ,  Atsushi KAWASUMI

IPC: G11C13/00

Abstract: A semiconductor memory device includes a first conductor that extends in a first direction, a second conductor that extends in a second direction, a first memory cell connected between the first conductor and the second conductor and including a phase change element, and a control circuit. The control circuit applies a first voltage across the first memory cell via the first conductor and the second conductor during a first period of time of a write operation targeted to the first memory cell, and a second voltage across the first memory cell via the first conductor and the second conductor during a second period of time of the write operation after the first period. The first voltage is an overshoot voltage. The second voltage is a preset voltage having a magnitude sufficient to place the phase change element in a molten state during the second period of time.

公开(公告)号：US20200303004A1

公开(公告)日：2020-09-24

申请号：US16560554

申请日：2019-09-04

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Atsushi KAWASUMI

IPC: G11C13/00 ,  H01L27/24 ,  H01L45/00

Abstract: A semiconductor memory device of an embodiment includes: a first wiring disposed at a first level and extending in a first direction; a second and third wirings disposed at a second level and extending in the first direction; a plurality of fourth wirings disposed at a third level and extending in a third direction; a plurality of first resistive change elements disposed in intersection regions of the first and fourth wirings; a plurality of second resistive change elements disposed in intersection regions between the second wiring and the third wiring and the fourth wirings; a first driving circuit electrically connected to the first wiring, a second driving circuit electrically connected to the second wiring, and a third driving circuit electrically connected to the third wiring; and a control circuit that controls the first driving circuit, the second driving circuit, and the third driving circuit, and also the fourth wirings.

公开(公告)号：US20200295087A1

公开(公告)日：2020-09-17

申请号：US16558822

申请日：2019-09-03

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Atsushi KAWASUMI ,  Tsuneo INABA

IPC: H01L27/24 ,  H01L45/00

Abstract: A semiconductor memory device includes a first wiring extending in a first direction, a second wiring above the first wiring and extending in a second direction, first and second memory cells electrically connected in parallel between the first and second wirings and each including a phase change material, a first insulating film on a side portion of the first cell facing the second cell in the second direction, a third wiring above the second wiring and extending in the second direction, a fourth wiring above the third wiring and extending in the first direction, third and fourth memory cells electrically connected between the third and fourth wirings in parallel and each including a phase change material, and a second insulating film on a side of the third cell facing the fourth cell in the second direction. The first film has a higher thermal insulation capacity than the second film.