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28 条记录 (耗时 0.016 秒)

    Apparatus for reproducing a digital signal
    1.
    发明授权
    Apparatus for reproducing a digital signal 失效
    用于再现数字信号的装置

    公开(公告)号：US4875111A

    公开(公告)日：1989-10-17

    申请号：US87093

    申请日：1987-08-19

    申请人： Kentaro Odaka ,  Tadashi Fukami ,  Shinya Ozaki

    发明人： Kentaro Odaka ,  Tadashi Fukami ,  Shinya Ozaki

    IPC分类号： G11B5/09 ,  G11B5/008 ,  G11B5/53 ,  G11B15/18 ,  G11B15/467 ,  G11B20/10 ,  G11B27/00 ,  G11B27/30

    CPC分类号： G11B15/1875 ,  G11B15/4672 ,  G11B20/10527 ,  G11B27/005 ,  G11B27/3027 ,  G11B27/3063 ,  G11B5/0086 ,  G11B5/534 ,  G11B2220/90 ,  G11B2220/913

    摘要： In an apparatus for reproducing a digital signal wherein a signal is read by a plurality of reproducing rotary heads which trace a track with an interval narrower than the interval of tracks formed on a tape, a wrap angle with which a tape is wrapped around the periphery of a rotary drum to which the rotary heads are attached is selected to be less than 360.degree./n with respect to the number n (n is an integer) of rotary heads, the rotary heads are rotated at a speed twice the normal rotational speed of the heads, the demodulated digital signal is stored in a memory corresponding to a frame address and a block address detected from the reproduced digital signal, and then the digital signal stored in the memory is read out therefrom in a predetermined order, whereby an apparatus for correcting the tracking of the tape by the rotary heads can be eliminated.

    摘要翻译： 在用于再现数字信号的装置中，其中通过多个再现旋转磁头来读取信号的装置，其以比形成在磁带上的轨迹的间隔窄的间隔跟踪轨道，将带缠绕在周边的包角 相对于旋转头的数量n（n是整数），将旋转头安装到的旋转磁鼓的旋转磁头选择为小于360°/ n，旋转磁头以正常转速的两倍的速度旋转 解调后的数字信号被存储在对应于从再现的数字信号检测的帧地址和块地址的存储器中，然后以预定顺序从存储器中读出存储在其中的数字信号，从而将装置 可以消除用于通过旋转磁头校正磁带的跟踪。

    Apparatus for reproducing a digital signal
    2.
    发明授权
    Apparatus for reproducing a digital signal 失效
    用于再现数字信号的装置

    公开(公告)号：US4799221A

    公开(公告)日：1989-01-17

    申请号：US21226

    申请日：1987-03-03

    申请人： Tadashi Fukami ,  Shinya Ozaki ,  Kentaro Odaka

    发明人： Tadashi Fukami ,  Shinya Ozaki ,  Kentaro Odaka

    IPC分类号： G11B15/18 ,  G11B20/10 ,  G11B20/18 ,  G11B27/00 ,  G06F11/10

    CPC分类号： G11B15/1875 ,  G11B20/10527 ,  G11B20/1813 ,  G11B27/005 ,  G11B2220/90 ,  G11B2220/913

    摘要： The invention relates to a digital signal reproducing apparatus to which continuous blocks of input data are supplied, each block consisting of a PCM signal which was error correction coded and additional codes which were subjected to error detection or error correction coding processes. The error pointers are set independently of the result of the error correction of the PCM signal on the basis of the decoding state of the decoder for decoding the additional codes using the error detection code or error correction code.

    摘要翻译： 本发明涉及一种数字信号再现装置，其中提供输入数据的连续块，每个块由纠错编码的PCM信号和经过错误检测或纠错编码处理的附加代码组成。 基于使用错误检测码或纠错码解码附加码的解码器的解码状态，错误指针被独立于PCM信号的纠错的结果设置。

    Decoding apparatus
    3.
    发明授权
    Decoding apparatus 失效
    解码装置

    公开(公告)号：US4802172A

    公开(公告)日：1989-01-31

    申请号：US19583

    申请日：1987-02-27

    申请人： Tadashi Fukami ,  Shinya Ozaki ,  Kentaro Odaka

    发明人： Tadashi Fukami ,  Shinya Ozaki ,  Kentaro Odaka

    IPC分类号： G11B20/10 ,  G11B20/18 ,  H03M13/00 ,  G06F11/10 ,  G11B5/00

    CPC分类号： G11B20/1809 ,  G11B20/10527

    摘要： A decoding apparatus in which the operation to write error correction coded data into a memory and a decoding processing operation of the data read out of the memory are executed in parallel. This decoding apparatus comprises: a comparator for comparing the address to write the data into the memory with the address in the memory for the decoding processing operation; and control means for inhibiting the writing operation when it is detected by the comparator that the decoding processing operation is precedent to the writing operation. With this apparatus, the data which was subjected to the correcting process is prevented from being rewritten into the memory and the pointer derived by the decoding process from being broken.

    摘要翻译： 执行并行地执行将纠错编码数据写入存储器的操作和从存储器读出的数据的解码处理操作的解码装置。 该解码装置包括：比较器，用于比较地址以将存储器中的数据写入到用于解码处理操作的存储器中的地址; 以及控制装置，用于当由比较器检测到写入操作时，解码处理操作是写入操作的先例。 利用该装置，防止了经过校正处理的数据被重写到存储器中，并且由解码处理导出的指针被破坏。

    Synchronizing circuit
    4.
    发明授权
    Synchronizing circuit 失效
    同步电路

    公开(公告)号：US4669000A

    公开(公告)日：1987-05-26

    申请号：US706924

    申请日：1985-02-12

    申请人： Kentaro Odaka ,  Tadashi Fukami ,  Shinya Ozaki

    发明人： Kentaro Odaka ,  Tadashi Fukami ,  Shinya Ozaki

    IPC分类号： G11B20/00 ,  G11B20/10 ,  G11B20/12 ,  G11B20/18 ,  G11B27/30 ,  G11B5/09 ,  G06F11/10

    CPC分类号： G11B20/1809 ,  G11B20/00007 ,  G11B20/10527 ,  G11B20/12 ,  G11B27/3027

    摘要： This invention relate to a synchronizing circuit for a data signal in which a data signal is divided at every predetermined number of bits, and every divided data signal is added with a synchronizing signal, an arbitrary address signal and an error detection signal for the address signal and received so as to be written in a memory in accordance with the address signal, which includes means (4) for detecting the synchronizing signal and means (3) for detecting an error of the address signal. The circuit further comprising an interpolation synchronizing signal generating circuit (6) and an interpolation address signal generating circuit (10), in which when the address signal is judged as being correct by the error detecting means (3), the interpolation synchronizing signal generating circuit (6) is driven, the interpolation address signal generating circuit (10) is driven by an interpolation synchronizing signal from the interpolation synchronizing signal generating circuit (6), and the address signal and the interpolation address signal are changed over on the basis of whether the address signal is correct or erroneous and then fed to the memory (13 ). According to this invention, it is possible to establish the synchronization by a circuit of a simple construction.

    摘要翻译： PCT No.PCT / JP84 / 00307 Sec。 371日期1985年2月12日 102（e）1985年2月12日PCT申请日1984年6月13日PCT公布。 第WO85 / 00066号公报 日期：1985年1月3日。本发明涉及一种数据信号的同步电路，其中数据信号以每预定位数分频，并且每个划分的数据信号加上同步信号，任意地址信号和 用于地址信号的误差检测信号，并被接收以便根据地址信号被写入存储器，该地址信号包括用于检测同步信号的装置（4）和用于检测地址信号的误差的装置（3）。 该电路还包括内插同步信号发生电路（6）和内插地址信号发生电路（10），其中当误差检测装置（3）判断为地址信号是正确的时，内插同步信号发生电路 （6）被驱动时，内插地址信号发生电路（10）由内插同步信号发生电路（6）的内插同步信号驱动，地址信号和内插地址信号根据是否 地址信号是正确的或错误的，然后被馈送到存储器（13）。 根据本发明，可以通过简单结构的电路来建立同步。

    Method and apparatus for reproducing or recording a PCM signal and sub data concerning the PCM signal in a paired format
    7.
    发明授权
    Method and apparatus for reproducing or recording a PCM signal and sub data concerning the PCM signal in a paired format 失效
    用于再现或记录PCM信号的方法和装置以及与配对格式相关的PCM信号的子数据

    公开(公告)号：US4812924A

    公开(公告)日：1989-03-14

    申请号：US23479

    申请日：1987-03-09

    申请人： Tadashi Fukami ,  Shinya Ozaki ,  Kentaro Odaka

    发明人： Tadashi Fukami ,  Shinya Ozaki ,  Kentaro Odaka

    IPC分类号： G11B20/10 ,  G11B20/12 ,  G11B20/18 ,  G11B27/30

    CPC分类号： G11B20/1251 ,  G11B20/1809 ,  G11B27/3027 ,  G11B27/3036 ,  G11B27/3063 ,  G11B20/1211 ,  G11B2020/10546 ,  G11B2220/90 ,  G11B2220/913

    摘要： A rotary head type digital tape recorder in which a PCM signal and sub data for control and the like concerned with the PCM signal are recorded and/or reproduced by rotary heads. The invention relates to a method and apparatus for transmitting and/or receiving a digital signal in such a type of digital tape recorder by using a data format such that when the serial data is input and output each of a predetermined number of words of the reproduced PCM signal and each symbol of the reproduced sub data are transmitted as a pair synchronously with the rotation of the rotary heads. Thus, a large amount of sub data can be input and output together with the PCM signal.

    摘要翻译： 一种旋转磁头式数字磁带记录器，其中PCM信号和与PCM信号相关的控制等的子数据由旋转磁头记录和/或再现。 本发明涉及一种通过使用数据格式在这种类型的数字磁带录像机中发送和/或接收数字信号的方法和装置，使得当串行数据被输入和输出时，再现了预定数量的字 PCM信号和再现子数据的每个符号与旋转头的旋转同步地传输。 因此，可以与PCM信号一起输入和输出大量的子数据。

    Encoding method for error correction
    8.
    发明授权
    Encoding method for error correction 失效
    纠错编码方法

    公开(公告)号：US4630272A

    公开(公告)日：1986-12-16

    申请号：US604537

    申请日：1984-04-27

    申请人： Tadashi Fukami ,  Kentaro Odaka ,  Shinya Ozaki

    发明人： Tadashi Fukami ,  Kentaro Odaka ,  Shinya Ozaki

    IPC分类号： G06F11/10 ,  G11B20/18 ,  H03M13/00 ,  H03M13/27

    CPC分类号： G11B20/1809

    摘要： An encoding method for error correction of digital information data is provided. The encoding method comprises the steps of arranging the digital information data in a plurality of blocks each including a plurality of symbols, and generating first redundacy data from first respective groups of digital information data constituting symbols which exist in at least two blocks in a first direction. Second redundancy data is generated from second respective groups of digital information data constituting symbols which are included in the plurality of blocks in a second direction. First code sequences are formed for first error detection from the first digital information data groups and the first redundancy data, and second code sequences are formed for second error detection from the second digital information data group and the second redundancy code. Blocks including at least one of the digital information data and the first redundancy data are transmitted, and blocks including the second redundancy data are also transmitted.

    摘要翻译： 提供了一种用于数字信息数据的纠错的编码方法。 编码方法包括以下步骤：将数字信息数据排列在多个块中，每个块包括多个符号，并且从构成符号的第一组数字信息数据生成第一冗余数据，所述数字信息数据存在于至少两个块中的第一方向 。 从在第二方向上包括在多个块中的构成符号的第二组数字信息数据生成第二冗余数据。 形成第一代码序列用于来自第一数字信息数据组和第一冗余数据的第一错误检测，并且形成第二代码序列用于来自第二数字信息数据组和第二冗余码的第二错误检测。 发送包括数字信息数据和第一冗余数据中的至少一个的块，并且还发送包括第二冗余数据的块。