Digital demodulator
    5.
    发明授权
    Digital demodulator 有权
    数字解调器

    公开(公告)号:US06813321B1

    公开(公告)日:2004-11-02

    申请号:US09582229

    申请日:2000-07-21

    IPC分类号: H03D322

    摘要: A digital demodulator which will need no absolute phasing circuit is provided. A known-pattern BPSK signal generating circuit 6 generates the same known-pattern BPSK signal as a known-pattern BPSK signal in a received digital modulated wave in synchronism with the known-pattern BPSK signal in the received digital modulated wave, a carrier-reproducing phase error detecting circuit 7 has a phase error table where one of reference phases in a signal point position of a demodulation baseband signal is made a convergence point, a phase error voltage corresponding to a phase error between a phase determined from the signal point position of the demodulation baseband signals and a phase convergence point is sent out, by enable-controlling a carrier-reproducing loop filter 8 according to the known-pattern BPSK signal outputted from the known-pattern BPSK signal generating circuit 6, the phase error voltage is smoothed, and carrier reproduction is performed while controlling the frequency of a reproduced carrier according to the smoothed output so that the phase in the signal point position coincides with the phase convergence point.

    摘要翻译: 提供了不需要绝对定相电路的数字解调器。 已知模式BPSK信号发生电路6与接收的数字调制波中的已知模式BPSK信号同步地产生与接收的数字调制波中已知模式BPSK信号相同的已知模式BPSK信号,载波再现 相位误差检测电路7具有相位误差表,其中解调基带信号的信号点位置中的参考相位之一成为会聚点,相位误差电压对应于从信号点位置确定的相位之间的相位误差 通过根据从已知模式BPSK信号发生电路6输出的已知模式BPSK信号启用控制载波再现环路滤波器8,发送解调基带信号和相位收敛点,平滑相位误差电压 并且在根据平滑输出控制再现载波的频率的同时执行载波再现,使得si中的相位 点位置与相位收敛点一致。